Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-11-14 | clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' | Shawn Guo | 1 | -1/+11 |
2017-06-21 | clk: hisilicon: add usb2 clocks for hi3798cv200 SoC | Jiancheng Xue | 1 | -0/+21 |
2016-11-11 | clk: hisilicon: add CRG driver for Hi3798CV200 SoC | Jiancheng Xue | 1 | -0/+337 |