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path: root/drivers/clk/clk-ppc-corenet.c
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2014-07-01clk: ppc-corenet: Fix Section mismatch warningJingchang Lu1-1/+1
WARNING: drivers/built-in.o(.data+0x10258): Section mismatch in reference from the variable ppc_corenet_clk_driver to the (unknown reference) .init.rodata:(unknown) The variable ppc_corenet_clk_driver references the (unknown reference) __initconst (unknown) If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-19clk: mpc85xx: Update the driver to align to new clock bindingsTang Yuantian1-22/+48
The clock bindings for Freescale CoreNet platform are updated. So, the driver needs to be updated accordingly. The main changes include: - Added a new node to present the input system clock - Changed PLL and MUX's compatible string Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-11-11powerpc: add missing explicit OF includes for ppcRob Herring1-0/+1
Commit b5b4bb3f6a11f9 (of: only include prom.h on sparc) removed implicit includes of of_*.h headers by powerpc's prom.h. Some components were missed in initial clean-up patch, so add the necessary includes to fix powerpc builds. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Tejun Heo <tj@kernel.org> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-ide@vger.kernel.org Cc: linux-crypto@vger.kernel.org
2013-05-30clk: mpc85xx: Update the compatible stringTang Yuantian1-1/+1
The compatible string of clock is changed from *-2 to *-2.0 on chassis 2. So updated it accordingly. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved $SUBJECT line]
2013-05-28clk: add PowerPC corenet clock driver supportTang Yuantian1-0/+280
This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>