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path:
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/
drivers
/
clk
/
clk-axi-clkgen.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-10-13
clk: axi-clkgen: Set power bits for fractional mode
Lars-Peter Clausen
1
-0
/
+7
2020-10-13
clk: axi-clkgen: Add support for fractional dividers
Lars-Peter Clausen
1
-51
/
+129
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177
Thomas Gleixner
1
-3
/
+1
2017-12-21
clk: axi-clkgen: Round closest in round_rate() and recalc_rate()
Lars-Peter Clausen
1
-3
/
+7
2017-12-21
clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()
Lars-Peter Clausen
1
-5
/
+24
2016-08-24
clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs
Stephen Boyd
1
-6
/
+6
2016-01-29
clk: axi-clkgen: Remove sometimes impossible check
Stephen Boyd
1
-4
/
+1
2016-01-29
clk: axi-clkgen: Add multi-parent support
Lars-Peter Clausen
1
-6
/
+34
2016-01-29
clk: axi-clkgen: Remove version 1 support
Lars-Peter Clausen
1
-121
/
+4
2015-07-20
clk: axi-clkgen: Remove clk.h include
Stephen Boyd
1
-1
/
+0
2014-09-25
clk: Remove .owner field for driver
Kiran Padwal
1
-1
/
+0
2014-02-26
clk: axi-clkgen: Add support for v2
Lars-Peter Clausen
1
-43
/
+269
2013-03-19
clk: Add axi-clkgen driver
Lars-Peter Clausen
1
-0
/
+331