summaryrefslogtreecommitdiffstats
path: root/drivers/clk/bcm
AgeCommit message (Expand)AuthorFilesLines
2016-03-15clk: bcm2835: fix check of error code returned by devm_ioremap_resource()Vladimir Zapolskiy1-2/+2
2016-03-02clk: bcm: Remove CLK_IS_ROOTStephen Boyd1-6/+3
2016-02-25clk: bcm2835: added missing clock register definitionsMartin Sperl1-0/+13
2016-02-16Merge branch 'clk-bcm2835' into clk-nextMichael Turquette1-16/+9
2016-02-16clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()Eric Anholt1-11/+2
2016-02-16clk: bcm2835: Fix setting of PLL divider clock ratesEric Anholt1-5/+7
2016-01-29clk: iproc: Remove __init from headerRay Jui1-11/+11
2016-01-29clk: iproc: Add support for Cygnus audio clocksSimran Rai3-5/+116
2015-12-24Merge branch 'clk-bcm2835' into clk-nextMichael Turquette1-54/+101
2015-12-24clk: bcm2835: Add PWM clock supportRemi Pommarel1-0/+13
2015-12-24clk: bcm2835: Support for clock parent selectionRemi Pommarel1-45/+77
2015-12-24clk: bcm2835: add a round up ability to the clock divisorRemi Pommarel1-10/+12
2015-12-22Merge branch 'clk-bcm2835' into clk-nextMichael Turquette2-0/+86
2015-12-22clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.Eric Anholt2-0/+86
2015-11-20clk: bcm: Add BCM63138 clock supportFlorian Fainelli3-0/+33
2015-10-21Merge branch 'clk-iproc' into clk-nextStephen Boyd7-157/+637
2015-10-21clk: ns2: add clock support for Broadcom Northstar 2 SoCJon Mason2-0/+289
2015-10-21clk: iproc: Separate status and control variablesJon Mason2-40/+62
2015-10-21clk: iproc: Split off dig_filterJon Mason4-17/+38
2015-10-21clk: iproc: Add PLL base write functionJon Mason1-47/+33
2015-10-21clk: nsp: add clock support for Broadcom Northstar Plus SoCJon Mason2-0/+137
2015-10-21clk: iproc: Add PWRCTRL supportJon Mason2-17/+44
2015-10-21clk: cygnus: Convert all macros to all capsJon Mason1-73/+73
2015-10-21ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabledArnd Bergmann1-3/+1
2015-10-21clk: iproc: Fix PLL output frequency calculationSimran Rai1-8/+5
2015-10-16clk: Allow drivers to build if COMPILE_TEST is enabledJavier Martinez Canillas1-2/+2
2015-10-12clk: bcm2835: Add support for programming the audio domain clocksEric Anholt1-1/+1521
2015-10-01clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.Eric Anholt2-0/+56
2015-08-24clk: bcm: Convert to clk_hw based provider APIsStephen Boyd1-10/+10
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd1-0/+1
2015-07-28Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd1-13/+21
2015-07-27clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon1-13/+21
2015-07-20clk: bcm: Include clk.hStephen Boyd1-0/+1
2015-07-02clk: iproc: fix bit manipulation arithmeticRay Jui1-2/+3
2015-07-02clk: iproc: fix memory leak from clock nameRay Jui2-12/+2
2015-06-18clk: cygnus: add clock support for Broadcom CygnusRay Jui2-0/+266
2015-06-18clk: iproc: add initial common clock supportRay Jui6-0/+1462
2015-05-14clk: bcm/kona: Remove ccu_listStephen Boyd2-6/+0
2015-05-14clk: bcm/kona: Silence sparse warningsStephen Boyd1-1/+1
2015-04-17clk: bcm/kona: use DIV_ROUND_CLOSEST_ULL()Javi Merino2-22/+7
2015-02-02clk: Add rate constraints to clocksTomeu Vizoso1-0/+2
2014-12-03clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso1-2/+2
2014-05-27clk: bcm/kona: implement determine_rate()Alex Elder1-1/+53
2014-04-30clk: bcm21664: use common clock frameworkAlex Elder3-1/+292
2014-04-30clk: bcm281xx: move compatible string definitionsAlex Elder1-12/+0
2014-04-30clk: bcm281xx: add clock hysteresis supportAlex Elder3-0/+82
2014-04-30clk: bcm281xx: add clock policy supportAlex Elder3-0/+318
2014-04-30clk: bcm281xx: define CCU clock data staticallyAlex Elder3-143/+133
2014-04-30clk: bcm281xx: initialize CCU structures staticallyAlex Elder4-119/+97
2014-04-30clk: bcm281xx: change some symbol namesAlex Elder1-11/+16