linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2019-07-22	clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1	Codrin Ciubotariu	1	-0/+2
2019-07-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-67/+214
2019-06-27	clk: at91: sckc: use dedicated functions to unregister clock	Claudiu Beznea	1	-2/+2
2019-06-27	clk: at91: sckc: improve error path for sama5d4 sck registration	Claudiu Beznea	1	-15/+28
2019-06-27	clk: at91: sckc: remove unnecessary line	Claudiu Beznea	1	-1/+0
2019-06-27	clk: at91: sckc: improve error path for sam9x5 sck register	Claudiu Beznea	1	-18/+32
2019-06-27	clk: at91: sckc: add support to free slow clock osclillator	Claudiu Beznea	1	-0/+8
2019-06-27	clk: at91: sckc: add support to free slow rc oscillator	Claudiu Beznea	1	-0/+8
2019-06-27	clk: at91: sckc: add support to free slow oscillator	Claudiu Beznea	1	-0/+8
2019-06-26	clk: at91: sckc: add support for SAM9X60	Claudiu Beznea	1	-0/+74
2019-06-26	clk: at91: sckc: add support to specify registers bit offsets	Claudiu Beznea	1	-32/+61
2019-06-26	clk: at91: sckc: sama5d4 has no bypass support	Claudiu Beznea	1	-6/+0
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	Thomas Gleixner	17	-101/+17
2019-05-07	Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...	Stephen Boyd	15	-154/+840
2019-04-25	clk: at91: Mark struct clk_range as const	Stephen Boyd	7	-14/+14
2019-04-25	clk: at91: add sam9x60 pmc driver	Alexandre Belloni	2	-0/+308
2019-04-25	clk: at91: add sam9x60 PLL driver	Alexandre Belloni	3	-0/+337
2019-04-25	clk: at91: master: Add sam9x60 support	Alexandre Belloni	2	-3/+6
2019-04-25	clk: at91: usb: Add sam9x60 support	Alexandre Belloni	2	-6/+30
2019-04-25	clk: at91: allow configuring generated PCR layout	Alexandre Belloni	4	-24/+29
2019-04-25	clk: at91: allow configuring peripheral PCR layout	Alexandre Belloni	6	-22/+71
2019-04-25	clk: at91: sckc: handle different RC startup time	Alexandre Belloni	1	-2/+15
2019-04-25	clk: at91: modernize sckc binding	Alexandre Belloni	1	-89/+36
2019-03-18	clk: at91: fix programmable clock for sama5d2	Matthias Wieloch	3	-15/+54
2019-03-08	Merge branch 'clk-at91' into clk-next	Stephen Boyd	3	-5/+10
2019-02-25	clk: at91: programmable: remove unneeded register read	Nicolas Ferre	1	-3/+0
2019-02-22	clk: at91: optimize clk_round_rate() for AUDIO_PLL	Michał Mirosław	1	-1/+8
2019-02-20	clk: at91: fix masterck name	Alexandre Belloni	3	-4/+4
2019-02-20	clk: at91: fix at91sam9x5 peripheral clock number	Alexandre Belloni	1	-2/+1
2019-01-09	clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2	Michał Mirosław	1	-1/+2
2018-10-18	Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' ...	Stephen Boyd	24	-990/+2870
2018-10-17	clk: at91: move DT compatibility code to its own file	Alexandre Belloni	17	-944/+962
2018-10-17	clk: at91: add at91sam9rl PMC driver	Alexandre Belloni	2	-1/+172
2018-10-17	clk: at91: add at91sam9x5 PMCs driver	Alexandre Belloni	2	-1/+310
2018-10-17	clk: at91: add at91sam9260 PMC driver	Alexandre Belloni	2	-0/+495
2018-10-17	clk: at91: add sama5d2 PMC driver	Alexandre Belloni	2	-0/+337
2018-10-17	clk: at91: add sama5d4 pmc driver	Alexandre Belloni	2	-0/+265
2018-10-17	clk: at91: add new DT lookup function	Alexandre Belloni	1	-0/+34
2018-10-17	clk: at91: add pmc_data struct and helpers	Alexandre Belloni	2	-0/+61
2018-10-17	clk: at91: allow clock registration from C code	Alexandre Belloni	14	-59/+172
2018-10-17	clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()	Alexandre Belloni	1	-17/+10
2018-10-17	clk: at91: audio-pll: separate registration from DT parsing	Alexandre Belloni	1	-38/+111
2018-10-17	clk: at91: h32mx: separate registration from DT parsing	Alexandre Belloni	1	-13/+27
2018-10-17	clk: at91: generated: SSCs don't have a gclk	Alexandre Belloni	1	-4/+1
2018-10-17	clk: at91: audio-pll: fix audio pmc type	Alexandre Belloni	1	-1/+1
2018-10-16	clk: at91: Fix division by zero in PLL recalc_rate()	Ronald Wahl	1	-0/+3
2018-07-06	clk: at91: add I2S clock mux driver	Codrin Ciubotariu	2	-0/+117
2018-05-15	clk: at91: PLL recalc_rate() now using cached MUL and DIV values	Marcin Ziemianowicz	1	-12/+1
2017-12-21	clk: at91: pmc: Support backup for programmable clocks	Romain Izard	3	-0/+39
2017-12-21	clk: at91: pmc: Save SCSR during suspend	Romain Izard	1	-2/+2