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path: root/drivers/clk/at91
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2019-12-16clk: at91: fix possible deadlockAlexandre Belloni6-6/+6
2019-12-01Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-2/+1
2019-11-08drivers/clk: convert VL struct to struct_sizeStephen Kitt1-2/+1
2019-10-28clk: at91: avoid sleeping earlyAlexandre Belloni2-5/+20
2019-10-03clk: at91: sam9x60: fix programmable clockEugen Hristev1-0/+1
2019-09-20Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-5/+9
2019-09-17clk: at91: allow 24 Mhz clock as input for PLLEugen Hristev1-1/+1
2019-09-16clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev1-3/+7
2019-09-16clk: at91: fix update bit maps on CFG_MOR writeEugen Hristev1-1/+1
2019-07-22clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1Codrin Ciubotariu1-0/+2
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-67/+214
2019-06-27clk: at91: sckc: use dedicated functions to unregister clockClaudiu Beznea1-2/+2
2019-06-27clk: at91: sckc: improve error path for sama5d4 sck registrationClaudiu Beznea1-15/+28
2019-06-27clk: at91: sckc: remove unnecessary lineClaudiu Beznea1-1/+0
2019-06-27clk: at91: sckc: improve error path for sam9x5 sck registerClaudiu Beznea1-18/+32
2019-06-27clk: at91: sckc: add support to free slow clock osclillatorClaudiu Beznea1-0/+8
2019-06-27clk: at91: sckc: add support to free slow rc oscillatorClaudiu Beznea1-0/+8
2019-06-27clk: at91: sckc: add support to free slow oscillatorClaudiu Beznea1-0/+8
2019-06-26clk: at91: sckc: add support for SAM9X60Claudiu Beznea1-0/+74
2019-06-26clk: at91: sckc: add support to specify registers bit offsetsClaudiu Beznea1-32/+61
2019-06-26clk: at91: sckc: sama5d4 has no bypass supportClaudiu Beznea1-6/+0
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner17-101/+17
2019-05-07Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...Stephen Boyd15-154/+840
2019-04-25clk: at91: Mark struct clk_range as constStephen Boyd7-14/+14
2019-04-25clk: at91: add sam9x60 pmc driverAlexandre Belloni2-0/+308
2019-04-25clk: at91: add sam9x60 PLL driverAlexandre Belloni3-0/+337
2019-04-25clk: at91: master: Add sam9x60 supportAlexandre Belloni2-3/+6
2019-04-25clk: at91: usb: Add sam9x60 supportAlexandre Belloni2-6/+30
2019-04-25clk: at91: allow configuring generated PCR layoutAlexandre Belloni4-24/+29
2019-04-25clk: at91: allow configuring peripheral PCR layoutAlexandre Belloni6-22/+71
2019-04-25clk: at91: sckc: handle different RC startup timeAlexandre Belloni1-2/+15
2019-04-25clk: at91: modernize sckc bindingAlexandre Belloni1-89/+36
2019-03-18clk: at91: fix programmable clock for sama5d2Matthias Wieloch3-15/+54
2019-03-08Merge branch 'clk-at91' into clk-nextStephen Boyd3-5/+10
2019-02-25clk: at91: programmable: remove unneeded register readNicolas Ferre1-3/+0
2019-02-22clk: at91: optimize clk_round_rate() for AUDIO_PLLMichał Mirosław1-1/+8
2019-02-20clk: at91: fix masterck nameAlexandre Belloni3-4/+4
2019-02-20clk: at91: fix at91sam9x5 peripheral clock numberAlexandre Belloni1-2/+1
2019-01-09clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2Michał Mirosław1-1/+2
2018-10-18Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' ...Stephen Boyd24-990/+2870
2018-10-17clk: at91: move DT compatibility code to its own fileAlexandre Belloni17-944/+962
2018-10-17clk: at91: add at91sam9rl PMC driverAlexandre Belloni2-1/+172
2018-10-17clk: at91: add at91sam9x5 PMCs driverAlexandre Belloni2-1/+310
2018-10-17clk: at91: add at91sam9260 PMC driverAlexandre Belloni2-0/+495
2018-10-17clk: at91: add sama5d2 PMC driverAlexandre Belloni2-0/+337
2018-10-17clk: at91: add sama5d4 pmc driverAlexandre Belloni2-0/+265
2018-10-17clk: at91: add new DT lookup functionAlexandre Belloni1-0/+34
2018-10-17clk: at91: add pmc_data struct and helpersAlexandre Belloni2-0/+61
2018-10-17clk: at91: allow clock registration from C codeAlexandre Belloni14-59/+172
2018-10-17clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()Alexandre Belloni1-17/+10