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2020-05-15MIPS: SGI-IP27: Use the _AC() macro in spaces.hJoshua Kinard1-5/+7
The attached patch wraps several of the macros in IP27's spaces.h header file with the _AC() macro. This matches most of the other spaces.h files in the MIPS tree. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-15MIPS: ralink: Don't include objects twiceThomas Bogendoerfer1-1/+0
With the change of platform file inclusion object were included via platform-y and core-y. Remove the core-y part to fix it. Fixes: 26bff9eb49201aeb ("MIPS: Only include the platformfile needed") Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-15MIPS: Fix builds for VR41xx platformsThomas Bogendoerfer2-3/+5
Changing inclusion of Platform files, broke VR41xx platforms. Add Makefile to vr41xx directory and traverse subdirs from it. Fixes: 26bff9eb49201aeb ("MIPS: Only include the platformfile needed") Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-14KVM: MIPS/Emulate: Remove unneeded semicolonZou Wei1-2/+2
Fixes coccicheck warnings: arch/mips/kvm/emulate.c:1793:3-4: Unneeded semicolon arch/mips/kvm/emulate.c:1968:3-4: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-14KVM: MIPS/VZ: Remove unneeded semicolonZou Wei1-5/+5
Fixes coccicheck warnings: arch/mips/kvm/vz.c:1186:4-5: Unneeded semicolon arch/mips/kvm/vz.c:1195:3-4: Unneeded semicolon arch/mips/kvm/vz.c:1949:3-4: Unneeded semicolon arch/mips/kvm/vz.c:1121:2-3: Unneeded semicolon arch/mips/kvm/vz.c:2188:3-4: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-14KVM: MIPS/TLB: Remove Unneeded semicolon in tlb.cJason Yan1-2/+2
Fix the following coccicheck warning: arch/mips/kvm/tlb.c:472:2-3: Unneeded semicolon arch/mips/kvm/tlb.c:489:2-3: Unneeded semicolon Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-14KVM: MIPS: use true,false for bool variableJason Yan1-2/+2
Fix the following coccicheck warning: arch/mips/kvm/mips.c:82:1-28: WARNING: Assignment of 0/1 to bool variable arch/mips/kvm/mips.c:88:1-28: WARNING: Assignment of 0/1 to bool variable Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-14MIPS: dts: mscc: Updated changed name for miim pinctrl functionLars Povlsen1-1/+1
This is an add-on patch to the main SoC Sparx5 series (Message-ID: <20200513125532.24585-1-lars.povlsen@microchip.com>). This changes the miim pinctrl function name from "miim1" to "miim" due to refactoring in the driver, obsoleting the instance number. The change in the driver was to better fit new platforms, as the instance number is redundant information. Specifically, support for the Microchip Sparx5 SoC is being submitted, where this change became necessary. Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-13MIPS: Fix "make clean" error due to recent changesHuacai Chen1-1/+1
Commit 26bff9eb49201aeb ("MIPS: Only include the platformfile needed") moves platform-(CONFIG_XYZ) from arch/mips/xyz/Platform to arch/mips/ Kbuild.platforms. This change causes an error when "make clean": ./scripts/Makefile.clean:15: arch/mips/vr41xx/Makefile: No such file or directory make[3]: *** No rule to make target `arch/mips/vr41xx/Makefile'. Stop. make[2]: *** [arch/mips/vr41xx] Error 2 make[1]: *** [_clean_arch/mips] Error 2 make: *** [sub-make] Error 2 Clean-files are defined in arch/mips/Kbuild: obj- := $(platform-) Due to the movement of platform-(CONFIG_XYZ), "make clean" will enter arch/mips/vr41xx/ whether CONFIG_MACH_VR41XX is defined or not. Because there is no Makefile in arch/mips/vr41xx/, "make clean" fails. I don't know what is the best way to fix it, but it seems like we can avoid this error by changing the obj- definition: obj- := $(platform-y) Fixes: 26bff9eb49201aeb ("MIPS: Only include the platformfile needed") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-13MIPS: Fix typos in arch/mips/Kbuild.platformsHuacai Chen1-2/+2
Commit 26bff9eb49201aeb ("MIPS: Only include the platform file needed") misspelled "txx9" to "tx99", so fix it. Fixes: 26bff9eb49201aeb ("MIPS: Only include the platform file needed") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-13MIPS: Only include the platform file neededThomas Bogendoerfer32-77/+39
Instead of including all Platform files, we simply include the needed one and avoid clashes with makefile variables. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-12MIPS: VDSO: Allow ld.lld to link the VDSONathan Chancellor1-1/+1
Currently, when linking with ld.lld, this warning pops up: arch/mips/vdso/Makefile:70: MIPS VDSO requires binutils >= 2.25 CONFIG_LD_VERSION is set with scripts/ld-version.sh, which is specific to GNU ld. It returns 0 for ld.lld so CONFIG_MIPS_LD_CAN_LINK_VDSO does not set. ld.lld has a completely different versioning scheme (as it follows LLVM's versioning) and it does not have the issue mentioned in the comment block so it should be allowed to link the VDSO. With this patch, the VDSO successfully links and shows P_MIPS_PC32 in vgettimeofday.o. $ llvm-objdump -Dr arch/mips/vdso/vgettimeofday.o | grep R_MIPS_PC32 00000024: R_MIPS_PC32 _start 000000b0: R_MIPS_PC32 _start 000002bc: R_MIPS_PC32 _start 0000036c: R_MIPS_PC32 _start 00000468: R_MIPS_PC32 _start Reported-by: Dmitry Golovin <dima@golovin.in> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://github.com/ClangBuiltLinux/linux/issues/785 Link: https://github.com/llvm/llvm-project/commit/e364e2e9ce50c12eb2bf093560e1a1a8544d455a Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-12MIPS: VDSO: Use $(LD) instead of $(CC) to link VDSONathan Chancellor1-9/+4
Currently, the VDSO is being linked through $(CC). This does not match how the rest of the kernel links objects, which is through the $(LD) variable. When clang is built in a default configuration, it first attempts to use the target triple's default linker then the system's default linker, unless told otherwise through -fuse-ld=... We do not use -fuse-ld= because it can be brittle and we have support for invoking $(LD) directly. See commit fe00e50b2db8c ("ARM: 8858/1: vdso: use $(LD) instead of $(CC) to link VDSO") and commit 691efbedc60d2 ("arm64: vdso: use $(LD) instead of $(CC) to link VDSO") for examples of doing this in the VDSO. Do the same thing here. Replace the custom linking logic with $(cmd_ld) and ldflags-y so that $(LD) is respected. We need to explicitly add two flags to the linker that were implicitly passed by the compiler: -G 0 (which comes from ccflags-vdso) and --eh-frame-hdr. Before this patch (generated by adding '-v' to VDSO_LDFLAGS): <gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/collect2 \ -plugin <gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/liblto_plugin.so \ -plugin-opt=<gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/lto-wrapper \ -plugin-opt=-fresolution=/tmp/ccGEi5Ka.res \ --eh-frame-hdr \ -G 0 \ -EB \ -mips64r2 \ -shared \ -melf64btsmip \ -o arch/mips/vdso/vdso.so.dbg.raw \ -L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0/64 \ -L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0 \ -L<gcc_prefix>/lib/gcc/mips64-linux/9.3.0/../../../../mips64-linux/lib \ -Bsymbolic \ --no-undefined \ -soname=linux-vdso.so.1 \ -EB \ --hash-style=sysv \ --build-id \ -T arch/mips/vdso/vdso.lds \ arch/mips/vdso/elf.o \ arch/mips/vdso/vgettimeofday.o \ arch/mips/vdso/sigreturn.o After this patch: <gcc_prefix>/bin/mips64-linux-ld \ -m elf64btsmip \ -Bsymbolic \ --no-undefined \ -soname=linux-vdso.so.1 \ -EB \ -nostdlib \ -shared \ -G 0 \ --eh-frame-hdr \ --hash-style=sysv \ --build-id \ -T arch/mips/vdso/vdso.lds \ arch/mips/vdso/elf.o \ arch/mips/vdso/vgettimeofday.o arch/mips/vdso/sigreturn.o \ -o arch/mips/vdso/vdso.so.dbg.raw Note that we leave behind -mips64r2. Turns out that ld ignores it (see get_emulation in ld/ldmain.c). This is true of current trunk and 2.23, which is the minimum supported version for the kernel: https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=ld/ldmain.c;hb=aa4209e7b679afd74a3860ce25659e71cc4847d5#l593 https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=ld/ldmain.c;hb=a55e30b51bc6227d8d41f707654d0a5620978dcf#l641 Before this patch, LD=ld.lld did nothing: $ llvm-readelf -p.comment arch/mips/vdso/vdso.so.dbg | sed 's/(.*//' String dump of section '.comment': [ 0] ClangBuiltLinux clang version 11.0.0 After this patch, it does: $ llvm-readelf -p.comment arch/mips/vdso/vdso.so.dbg | sed 's/(.*//' String dump of section '.comment': [ 0] Linker: LLD 11.0.0 [ 62] ClangBuiltLinux clang version 11.0.0 Link: https://github.com/ClangBuiltLinux/linux/issues/785 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-12MIPS: Unconditionally specify '-EB' or '-EL'Nathan Chancellor1-25/+0
This was all done to work around a GCC bug that has been fixed after 4.2. The kernel requires GCC 4.6 or newer so remove all of these hacks and just use the traditional flags. $ mips64-linux-gcc --version | head -n1 mips64-linux-gcc (GCC) 4.6.3 $ mips64-linux-gcc -EB -dM -E -C -x c /dev/null | grep MIPSE #define MIPSEB 1 #define __MIPSEB__ 1 #define _MIPSEB 1 #define __MIPSEB 1 $ mips64-linux-gcc -EL -dM -E -C -x c /dev/null | grep MIPSE #define __MIPSEL__ 1 #define MIPSEL 1 #define _MIPSEL 1 #define __MIPSEL 1 This is necessary when converting the MIPS VDSO to use $(LD) instead of $(CC) to link because the OUTPUT_FORMAT is defaulted to little endian and only flips to big endian when '-EB' is set on the command line. There is no issue currently because the compiler explicitly passes '-EB' or '-EL' to the linker regardless of whether or not it was provided by the user. Passing '-v' to VDSO_LDFLAGS shows: <gcc_prefix>/libexec/gcc/mips64-linux/9.3.0/collect2 ... -EB ... even though '-EB' is nowhere to be found in KBUILD_CFLAGS. The VDSO Makefile already supports getting '-EB' or '-EL' from KBUILD_CFLAGS through a filter directive but '-EB' or '-EL' is not always present. If we do not do this, we will see the following error when compiling for big endian: $ make -j$(nproc) ARCH=mips CROSS_COMPILE=mips64-linux- \ 64r2el_defconfig arch/mips/vdso/ ... mips64-linux-ld: arch/mips/vdso/elf.o: compiled for a big endian system and target is little endian mips64-linux-ld: arch/mips/vdso/elf.o: endianness incompatible with that of the selected emulation mips64-linux-ld: failed to merge target specific data of file arch/mips/vdso/elf.o ... Remove this legacy hack and just use '-EB' and '-EL' unconditionally. Reported-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-12MIPS: VDSO: Move disabling the VDSO logic to KconfigNathan Chancellor4-29/+23
After commit 9553d16fa671 ("init/kconfig: Add LD_VERSION Kconfig"), we have access to GNU ld's version at configuration time. As a result, we can make it clearer under what configuration circumstances the MIPS VDSO needs to be disabled. This is a prerequisite for getting rid of the MIPS VDSO binutils warning and linking the VDSO when LD is ld.lld. Wrapping the call to ld-ifversion with CONFIG_LD_IS_LLD does not work because the config values are wiped away during 'make clean'. Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-11MIPS: unexport __flush_icache_user_rangeChristoph Hellwig1-1/+0
__flush_icache_user_range is not used in modular code, so unexport it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-09MIPS: Remove NEC MARKEINS/EMMAThomas Bogendoerfer19-1550/+0
No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-09MIPS: Remove PMC MSP71xx platformThomas Bogendoerfer35-5578/+0
No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-09MIPS: Remove support for LASATThomas Bogendoerfer39-3168/+0
All LASAT has probably gone bad, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-08MIPS: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-08MIPS: Loongson: Add DMA support for LS7ATiezhu Yang4-3/+30
In the current market, the most used bridge chip on the Loongson platform are RS780E and LS7A, the RS780E bridge chip is already supported by the mainline kernel. If use the default implementation of __phys_to_dma() and __dma_to_phys() in dma-direct.h when CONFIG_ARCH_HAS_PHYS_TO_DMA is not set, it works well used with LS7A on the Loongson single-way and multi-way platform, and also works well used with RS780E on the Loongson single-way platform, but the DMA address will be wrong on the non-node0 used with RS780E on the Loongson multi-way platform. Just as the description in the code comment, the devices get node id from 40 bit of HyperTransport bus, so we extract 2 bit node id (bit 44~45) from 48 bit address space of Loongson CPU and embed it into HyperTransport bus (bit 37-38), this operation can be done only at the software level used with RS780E on the Loongson multi-way platform, because it has no hardware function to translate address of node id, this is a hardware compatibility problem. Device | | DMA address | Host Bridge | | HT bus address (40 bit) | CPU | | physical address (48 bit) | RAM The LS7A has dma_node_id_offset field in the DMA route config register, the hardware can use the dma_node_id_offset to translate address of node id automatically, so we can get correct address when just use the dma_pfn_offset field in struct device. For the above reasons, in order to maintain downward compatibility to support the RS780E bridge chip, it is better to use the platform dependent implementation of __phys_to_dma() and __dma_to_phys(). Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-08MIPS: inst.h: Stop including asm.h to avoid various build failuresHuacai Chen1-89/+95
Commit d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to inst.h") causes a lot of build failures because macros in asm.h conflict with various subsystems. Some of these conflictions has been fixed (such as LONG, PANIC and PRINT) by adjusting asm.h, but some of them is nearly impossible to fix (such as PTR and END). The only reason of including asm.h in inst.h is that we need the PTR macro which is used by unaligned load/store helpers. So in this patch we define a new PTR_STR macro and use it to replace STR(PTR), then we can stop including asm.h to avoid various build failures. Fixes: d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to inst.h") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: asm: Rename some macros to avoid build errorsHuacai Chen4-16/+16
Use ASM_ prefix to rename some macros (PANIC and PRINT), in order to avoid build errors (all users are updated as well): 1, PANIC conflicts with drivers/scsi/smartpqi/smartpqi_init.c 2, PRINT conflicts with net/netfilter/nf_conntrack_h323_asn1.c and net/ mac80211/debugfs_sta.c Fixes: d339cd02b888eb8 ("MIPS: Move unaligned load/store helpers to inst.h") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07mips: cm: Add L2 ECC/parity errors reportingSerge Semin1-2/+60
According to the MIPS32 InterAptiv software manual error codes 24 - 26 of CM2 indicate L2 ECC/parity error with switching to a corresponding errors info fields. This patch provides these errors parsing code, which handles the read/write uncorrectable and correctable ECC/parity errors, and prints instruction causing the fault, RAM array type, cache way/dword and syndrome associated with the faulty data. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-pm@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07mips: cm: Fix an invalid error code of INTVN_*_ERRSerge Semin1-3/+3
Commit 3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache errors") adds cm2_causes[] array with map of error type ID and pointers to the short description string. There is a mistake in the table, since according to MIPS32 manual CM2_ERROR_TYPE = {17,18} correspond to INTVN_WR_ERR and INTVN_RD_ERR, while the table claims they have {0x17,0x18} codes. This is obviously hex-dec copy-paste bug. Moreover codes {0x18 - 0x1a} indicate L2 ECC errors. Fixes: 3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache errors") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-pm@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: ingenic: Replace <linux/clk-provider.h> by <linux/of_clk.h>Geert Uytterhoeven1-1/+1
The JZ4740 setup code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Fixes: f932449c11dabb4b ("MIPS: ingenic: Drop obsolete code, merge the rest in setup.c") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: Use fallthrough for arch/mipsLiangliang Huang42-135/+112
Convert the various /* fallthrough */ comments to the pseudo-keyword fallthrough; Done via script: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe@perches.com/ Signed-off-by: Liangliang Huang <huangll@lemote.com> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: Truncate link address into 32bit for 32bit kernelJiaxun Yang3-3/+14
LLD failed to link vmlinux with 64bit load address for 32bit ELF while bfd will strip 64bit address into 32bit silently. To fix LLD build, we should truncate load address provided by platform into 32bit for 32bit kernel. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://github.com/ClangBuiltLinux/linux/issues/786 Link: https://sourceware.org/bugzilla/show_bug.cgi?id=25784 Reviewed-by: Fangrui Song <maskray@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: Remove dead code in pci.hJason Yan1-3/+0
This code has been marked dead for more than 10 years. Seems no need to keep it now. Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: CFE: Remove dead code in cfe_getfwinfo()Jason Yan1-5/+0
This code has been marked dead since the beginning of the git history. Seems no need to keep it now. Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-07MIPS: Octeon: Remove dead code in __cvmx_helper_npi_probe()Jason Yan1-12/+0
This code has been marked dead for more than 10 years. Seems no need to keep it now. Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-04MIPS: tools: Move "returns" after "loongson3-llsc-check"Tiezhu Yang1-2/+2
Just move "returns" after "loongson3-llsc-check", no function changes. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-02MIPS: perf: Remove unnecessary "fallthrough" pseudo keywordsHuacai Chen1-2/+2
The last branch of switch-case doesn't need a "fallthrough" pseudo keyword, and it will cause errors when building a kernel with -Werror: arch/mips/kernel/perf_event_mipsxx.c: In function 'reset_counters': include/linux/compiler_attributes.h:200:41: error: attribute 'fallthrough' not preceding a case label or default label [-Werror] 200 | # define fallthrough __attribute__((__fallthrough__)) | ^~~~~~~~~~~~~ >> arch/mips/kernel/perf_event_mipsxx.c:932:3: note: in expansion of macro 'fallthrough' 932 | fallthrough; | ^~~~~~~~~~~ arch/mips/kernel/perf_event_mipsxx.c: In function 'loongson3_reset_counters': include/linux/compiler_attributes.h:200:41: error: attribute 'fallthrough' not preceding a case label or default label [-Werror] 200 | # define fallthrough __attribute__((__fallthrough__)) | ^~~~~~~~~~~~~ arch/mips/kernel/perf_event_mipsxx.c:903:3: note: in expansion of macro 'fallthrough' 903 | fallthrough; | ^~~~~~~~~~~ cc1: all warnings being treated as errors Fix it by removing unnecessary "fallthrough" pseudo keywords. Fixes: e9dfbaaeef1c9fe ("MIPS: perf: Add hardware perf events support for new Loongson-3") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-02mips: Drop CONFIG_MTD_M25P80 in various defconfig filesBin Meng5-5/+0
Drop CONFIG_MTD_M25P80 that was removed in commit b35b9a10362d ("mtd: spi-nor: Move m25p80 code in spi-nor.c") Signed-off-by: Bin Meng <bin.meng@windriver.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-02MIPS: Loongson64: Correct TLB type for Loongson-3 ClassicJiaxun Yang1-1/+4
Huacai just informed me that some early Loongson-3A2000 had wrong TLB type in Config0 register. That means we have to correct it via PRID. It looks like I shoudn't drop MIPS_CPU_FTLB flag in PRID case for Loongson-3 Classic. Fixes: da1bd29742b1 ("MIPS: Loongson64: Probe CPU features via CPUCFG") Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reported-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-30MIPS: Loongson64: Probe CPU features via CPUCFGJiaxun Yang1-8/+37
CPUCFG is a Loongson self-defined instruction used to mark CPU features for Loongson processors started from Loongson-3A4000. Slightly adjust cpu_probe_loongson function as well. Remove features that already probed via decode_configs in processor's PRID case and add a comment about TLBINV. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-30MIPS: perf: Add hardware perf events support for new Loongson-3Huacai Chen2-33/+341
New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs. Loongson-3 processors have three types of PMU types (so there are three event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1, Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-30MIPS: tools: Show result for loongson3-llsc-checkTiezhu Yang1-0/+2
It is better to show the result before loongson3-llsc-check exit, otherwise we can see nothing if the return status is EXIT_SUCCESS, it seems confusing. E.g. without this patch: [loongson@localhost tools]$ ./loongson3-llsc-check ../../../vmlinux [loongson@localhost tools]$ With this patch: [loongson@localhost tools]$ ./loongson3-llsc-check ../../../vmlinux loongson3-llsc-check returns success [loongson@localhost tools]$ Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: Drop obsolete code, merge the rest in setup.cPaul Cercueil12-373/+61
Drop a bootload of 10-years-old dirty code, that is not used anymore, as it has been replaced with clean code over the ages. Merge the very few bits left inside setup.c, so that everything is clean and tidy now. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: GCW0: Update defconfigPaul Cercueil1-3/+128
Enable support for the new hardware that was added in the devicetree. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: CI20: enable OST, PWM drivers in defconfigPaul Cercueil1-28/+34
The OST driver provides a clocksource and sched_clock that are much more accurate than the default ones. The PWM driver allows to use the PWM pins on the external header of the board. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Update GCW0 supportPaul Cercueil1-15/+484
Add support for the face buttons, the ACT8600 PMUC, the LCD panel with backlight, the rumble, internal/external SD readers, and other things. Note that the otg-phy node was dropped in the process as it was neither useful nor used, and was inside a non-compliant board "bus". Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Update JZ4770 supportPaul Cercueil1-7/+170
Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD, USB OTG, USB PHY controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OSTPaul Cercueil3-0/+72
Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Respect cell count of common propertiesPaul Cercueil4-36/+30
If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N*X) cells. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Fix invalid value in #dma-cellsPaul Cercueil1-2/+2
The driver requires two cells and not just one. Since these nodes are both disabled as no hardware currently use them, this fix does not really requires a Fixes: tag. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: Loongson64: Switch the order of RS780E and LS7ALiangliang Huang1-2/+2
Sort the members of enum in alphabetical order is better to avoid duplicate mistakes (because the list may be grow very large), so fix it by exchanging the order. Signed-off-by: Liangliang Huang <huangll@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-28MIPS: Loongson: Get host bridge informationTiezhu Yang2-0/+24
Read the address of host bridge configuration space to get the vendor ID and device ID of host bridge, and then we can distinguish various types of host bridge such as LS7A or RS780E. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-28MIPS: oprofile: remove unneeded semicolon in common.cJason Yan1-1/+1
Fix the following coccicheck warning: arch/mips/oprofile/common.c:113:2-3: Unneeded semicolon Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-26MIPS: Kernel: Identify Loongson-2K processorsJiaxun Yang4-5/+33
Loongson-2K (Loongson64 Reduced) is a family of SoC shipped with gs264e core. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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