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2013-09-04MIPS: ralink: Probe clocksources from OFJohn Crispin1-0/+1
Make plat_time_init() call clocksource_of_init() allowing the systick cevt to load. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/5670/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04MIPS: ralink: Add support for systick timer found on newer ralink SoCJohn Crispin3-0/+154
Newer Ralink SoC (MT7620x and RT5350) have a 50KHz clock that runs independent of the SoC master clock. If we want to automatic frequency scaling to work we need to use the systick timer as the clock source. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5669/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04MIPS: ralink: Add support for periodic timer irqJohn Crispin2-1/+186
Adds a driver for the periodic timer found on Ralink SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5682/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Built-in DTB for XLP2xx SoC boardsGanesan Ramalingam4-1/+135
Add a default built-in device tree for XLP2xx SoC. The new file xlp_fvp.dts has updated entries for I2C and memory. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Add support for USB on XLP2xxGanesan Ramalingam6-20/+270
Add USB intialization code to handle the new XLP2XX USB 3.0 block. This adds xlp/usb-init-xlp2.c to initialize the XLP2XX USB glue-logic for XHCI and EHCI. Interrupt and IO offset code in xlp-hal/iomap.h and xlp/nlm_hal.c is also updated for the new USB block. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5744/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: XLP2xx update for I2C controllerGanesan Ramalingam3-7/+21
XLP2xx has a new I2C controller which has 4 buses connected to it. Update the IO offset and IRQ mapping code to reflect this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Core wakeup changes for XLP2XXJayachandran C1-4/+6
On XLP2xx, wakeup code does not need to enable clock on the core. Update xlp/wakeup.c to handle this. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: XLP2XX CPU and PIC frequencyGanesan Ramalingam5-11/+153
Add code to calculate the CPU and PIC frequency for XLP2XX SoCs. Since the PIC frequency on XLP2XX can be configured, add a new macro pic_timer_freq() to be used in netlogic/common/time.c. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Call xlp_mmu_init on all threadsJayachandran C1-3/+1
The config7/config4 register has to be written on all the threads. This does not cause any problems in XLP, but is needed for XLPII Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5700/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Add support for XLP2XXJayachandran C4-7/+33
XLP2XX is first in the series of 28nm XLPII processors. The changes are to: * Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c. * Add a cpu_is_xlpii() function to check for XLPII processors. * Update xlp_mmu_init() to use config4 to enable extended TLB. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5698/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Fix DT flash size parameterJayachandran C2-2/+2
The flash chipselects can span 32MB, fix this in the built-in device tree. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5704/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Remove memory section from built-in DTJayachandran C2-14/+0
Do not pass a memory section in the built-in DTB, and let the boot code use the values from the DRAM BARs. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5699/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Netlogic: Read memory from DRAM BARsJayachandran C4-0/+65
Read the memory from the Bridge DRAM BARs, if it is not passed in from the device tree. This will allow us to remove memory configuration from built in device trees. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5743/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Switch to the clkdev frameworkGabor Juhos3-72/+55
The ath79 code uses static clock devices and provides its own clk_{get,put} implementations. Change the code to use dynamically allocated clock devices and register the clocks within the clkdev framework. Additionally, remove the local clk_{get,put} implementation. The clkdev framework has a common implementation of those. Also move the call of ath79_clock_init() from plat_mem_init() to plat_time_init(). Otherwise it would not be possible to use memory allocation functions from ath79clock_init() becasuse the memory subsystem is not yet initialized when plat_mem_init() runs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5780/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Use local variables for clock ratesGabor Juhos1-52/+106
Use local variables for ref, cpu, ddr and ahb rates in SoC specific clock init functions. The patch has no functional changes, it is an interim change in preparation of the next patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5781/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock ratesGabor Juhos2-11/+12
Instead of accessing the rate field of the static clock devices directly, use the recently introduced helper function to get the rate of the basic clocks. The static ath79_{ahb,cpu,ddr,ref}_clk variables will be removed by a subsequent patch. The actual change is in preparation of that. Also move the clock frequency printing code into the plat_time_init function. We are getting the cpu clock rate there already so we can save an extra call of the helper. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5782/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Use a helper function to get system clock ratesGabor Juhos4-11/+25
The ath79 platform uses similar code to get the rate of various clocks during init. Separate the similar code into a new helper function and use that to avoid code duplication. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5778/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Use local ref clock rate in ar934x_get_pll_freqGabor Juhos1-2/+2
The reference clock rate is passed in the first argument of the function. Use that instead of the rate of the global ath79_ref_clk variable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5779/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Fix ar933x watchdog clockFelix Fietkau1-1/+1
The watchdog device on the AR933x is connected to the AHB clock, however the current code uses the reference clock. Due to the wrong rate, the watchdog driver can't calculate correct register values for a given timeout value and the watchdog unexpectedly restarts the system. The code uses the wrong value since the initial commit 04225e1d227c8e68d685936ecf42ac175fec0e54 (MIPS: ath79: add AR933X specific clock init) The patch fixes the code to use the correct clock rate to avoid the problem. Cc: stable@vger.kernel.org Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5777/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: ath79: Don't hardwire cpu_has_dsp{2} to 0Gabor Juhos1-2/+0
The ath79 code supports various SoCs which are using either a 24Kc or a 74Kc core. The 74Kc core has DSP support, so don't hardwire the values to zero. Commit 00dc5ce2a653a332190aa29b2e1f3bceaa7d5b8d (MIPS: ath79: don't hardcode the unavailability of the DSP ASE) has fixed this already, but that change got reverted by 475032564ed96c94c085e3e7a90e07d150a7cec9 (MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.) Reported-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5750/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Lantiq: Add defconfig for xway SoCJohn Crispin1-0/+159
This add a default config for the Lantiq XWAY SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5796/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Lantiq: Falcon: fix asc clock definitionThomas Langer1-1/+4
The clocks of the serial ports were not setup properly. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Lantiq: Falcon: add cpu-feature-override.hThomas Langer1-0/+58
Add cpu-feature-override.h for the GPON SoC Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5658/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Lantiq: Adds minimal dcdc driverJohn Crispin2-1/+64
This driver so far only reads the core voltage. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Move declaration of Octeon function fixup_irqs() to header.Ralf Baechle3-4/+4
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Add uImage build targetJames Hogan3-0/+22
Add a uImage build target for MIPS, which builds uImage.gz (a U-Boot image of vmlinux.bin.gz), and then symlinks it to uImage. This allows for the use of other compression algorithms in future, and is how a few other architectures do it. It's enabled conditionally on load-y >= 0xffffffff80000000 which hopefully allows 64bit kernels to also work as long as the load and entry address can be represented by the 32bit addresses in the U-Boot image format. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5795/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Refactor load/entry address calculationsJames Hogan3-8/+13
The vmlinux load address and entry address is calculated in multiple places: - arch/mips/Makefile defines load-y from CONFIG_PHYSICAL_START (or defined by the platform) and passes it to arch/mips/boot/compressed/Makefile. - arch/mips/boot/compressed/Makefile calculates kernel entry using nm. - arch/mips/lasat/image/Makefile calculates both load and entry address using nm. Lets combine these in the main Makefile and then pass them as Make parameters to each of the three boot image Makefiles (in boot/, boot/compressed, lasat/image/). The boot/ Makefile doesn't currently use them, but will soon need to for U-Boot image targets. The existing load-y definition is used in preference to calculating the load address using nm. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5794/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: Refactor boot and boot/compressed rulesJames Hogan1-2/+13
Split out the arch/mips/boot/ and arch/mips/boot/compressed/ targets into boot-y and bootz-y variables. This makes it slightly cleaner to add new targets. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5793/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03MIPS: add <dt-bindings/> symlinkJames Hogan1-0/+1
Add symlink to include/dt-bindings from arch/mips/boot/dts/include/ to match the ones in ARM and Meta architectures so that preprocessed device tree files can include various useful constant definitions. See commit c58299a (kbuild: create an "include chroot" for DT bindings) merged in v3.10-rc1 for details. MIPS structures it's dts files a little differently to other architectures, having a separate dts directory for each SoC/platform, but most of the definitions in the dt-bindings/ directory are common so for now lets just have a single "include chroot" for all MIPS platforms. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Steven. J. Hill <steven.hill@imgtec.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kbuild@vger.kernel.org Acked-by: Stephen Warren <swarren@nvidia.com> Patchwork: http://patchwork.linux-mips.org/patch/5745/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Discard .eh_frame sections in linker script.David Daney1-0/+1
Some toolchains (including Cavium OCTEON SDK) are emitting .eh_frame sections by default. Discard them as they are useless in the kernel. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5684/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: OCTEON: Select ARCH_REQUIRE_GPIOLIBDavid Daney2-0/+22
... and create asm/mach-cavium-octeon/gpio.h so that things continue to build. This allows us to use the existing I2C connected GPIO expanders. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5632/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Remove unreachable break statements from cp1emu.cDavid Daney1-27/+0
There were many cases of: return something; break; All those break statements are unreachable and thus redundant. Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: BMIPS: Fix compilation for BMIPS5000Ralf Baechle1-33/+22
Commit 02b849f7613003fe5f9e58bf233d49b0ebd4a5e8 ("MIPS: Get rid of the use of .macro in C code.") replaced the macro usage but missed the accessors in bmips.h, causing the following build error: CC arch/mips/kernel/smp-bmips.o {standard input}: Assembler messages: {standard input}:951: Error: Unrecognized opcode `_ssnop' {standard input}:952: Error: Unrecognized opcode `_ssnop' (...) make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1 Fix by rewriting the inline assembler using existing inline functions. The generated code should stay unchanged. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5644/ Reviewed-by: Jonas Gorski <jogo@openwrt.org>
2013-08-26MIPS: cavium-octeon: fix I/O space setup on non-PCI systemsAaro Koskinen2-4/+33
Fix I/O space setup, so that on non-PCI systems using inb()/outb() won't crash the system. Some drivers may try to probe I/O space and for that purpose we can just allocate some normal memory initially. Drivers trying to reserve a region will fail early as we set the size to 0. If a real I/O space is present, the PCI/PCIe support code will re-adjust the values accordingly. Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused the originally reported crash. Reported-by: Faidon Liambotis <paravoid@debian.org> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5626/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS:Netlogic: Remove redundant value in operation.Alexandru Juncu1-2/+1
Removed parameters checked twice in logical OR operation. Suggested by coccinelle and manually verified. Signed-off-by: Alexandru Juncu <alexj@rosedu.org> Cc: jchandra@broadcom.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5627/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: OCTEON: Set L1 cache parameters for OCTEON3 CPUs.David Daney1-0/+14
Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5638/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Generate OCTEON3 TLB handlers with the same features as OCTEON2.David Daney1-0/+2
OCTEON2 need the same code. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5637/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Use r4k_wait for OCTEON3 CPUs.David Daney1-0/+1
Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5636/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Probe for new OCTEON CPU/SoC types.David Daney1-0/+7
Add probing for CNF71XX, CN78XX and CN70XX. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5635/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: Add CPU identifiers for more OCTEON family members.David Daney1-1/+4
Needed to support new SOCs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5634/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: use generic-y where possibleJames Hogan17-58/+16
Use generic-y and remove headers in arch/mips/include/[uapi/]asm/Kbuild where the header just includes or is identical to the corresponding <asm-generic/*.h>. We can't do the same for uapi/asm/kvm_para.h because it's presence is explicitly checked in include/uapi/linux/Kbuild to decide whether to add kvm_para.h to header-y. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Tejun Heo <tj@kernel.org> Cc: Dave Jones <davej@redhat.com> Cc: David Howells <dhowells@redhat.com> Cc: David Sharp <dhsharp@google.com> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5581/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: tlbex: Guard tlbmiss_handler_setup_pgdTony Wu1-0/+2
tlbmiss_handler_setup_pgd* are only referenced when CONFIG_MIPS_PGD_C0_CONTEXT is defined. Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: Jayachandran C. <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5601/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-25Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds3-4/+9
Pull ARM fixes from Russell King: "This round of fixes is smaller than previous: a couple more updates for the security fixes, and a one-liner kexec fix" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7816/1: CONFIG_KUSER_HELPERS: fix help text ARM: 7815/1: kexec: offline non panic CPUs on Kdump panic ARM: 7819/1: fiq: Cast the first argument of flush_icache_range()
2013-08-24ARC: [lib] strchr breakage in Big-endian configurationJoern Rennecke1-0/+10
For a search buffer, 2 byte aligned, strchr() was returning pointer outside of buffer (buf - 1) ------------->8---------------- // Input buffer (default 4 byte aigned) char *buffer = "1AA_"; // actual search start (to mimick 2 byte alignment) char *current_line = &(buffer[2]); // Character to search for char c = 'A'; char *c_pos = strchr(current_line, c); printf("%s\n", c_pos) --> 'AA_' as oppose to 'A_' ------------->8---------------- Reported-by: Anton Kolesov <Anton.Kolesov@synopsys.com> Debugged-by: Anton Kolesov <Anton.Kolesov@synopsys.com> Cc: <stable@vger.kernel.org> # [3.9 and 3.10] Cc: Noam Camus <noamc@ezchip.com> Signed-off-by: Joern Rennecke <joern.rennecke@embecosm.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-22Merge tag 'fixes-for-linus' of ↵Linus Torvalds14-15/+24
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A handful of fixes for 3.11 are still trickling in. These are: - A couple of fixes for older OMAP platforms - Another few fixes for at91 (lateish due to European summer vacations) - A late-found problem with USB on Tegra, fix is to keep VBUS regulator on at all times - One fix for Exynos 5440 dealing with CPU detection - One MAINTAINERS update" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: always enable USB VBUS regulators ARM: davinci: nand: specify ecc strength ARM: OMAP: rx51: change musb mode to OTG ARM: OMAP2: fix musb usage for n8x0 MAINTAINERS: Update email address for Benoit Cousson ARM: at91/DT: fix at91sam9n12ek memory node ARM: at91: add missing uart clocks DT entries ARM: SAMSUNG: fix to support for missing cpu specific map_io ARM: at91/DT: at91sam9x5ek: fix USB host property to enable port C
2013-08-22x86 get_unmapped_area: Access mmap_legacy_base through mm_struct memberRadu Caragea2-3/+5
This is the updated version of df54d6fa5427 ("x86 get_unmapped_area(): use proper mmap base for bottom-up direction") that only randomizes the mmap base address once. Signed-off-by: Radu Caragea <sinaelgl@gmail.com> Reported-and-tested-by: Jeff Shorey <shoreyjeff@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Michel Lespinasse <walken@google.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Rik van Riel <riel@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Adrian Sendroiu <molecula2788@gmail.com> Cc: Greg KH <greg@kroah.com> Cc: Kamal Mostafa <kamal@canonical.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-22Revert "x86 get_unmapped_area(): use proper mmap base for bottom-up direction"Linus Torvalds2-2/+2
This reverts commit df54d6fa54275ce59660453e29d1228c2b45a826. The commit isn't necessarily wrong, but because it recalculates the random mmap_base every time, it seems to confuse user memory allocators that expect contiguous mmap allocations even when the mmap address isn't specified. In particular, the MATLAB Java runtime seems to be unhappy. See https://bugzilla.kernel.org/show_bug.cgi?id=60774 So we'll want to apply the random offset only once, and Radu has a patch for that. Revert this older commit in order to apply the other one. Reported-by: Jeff Shorey <shoreyjeff@gmail.com> Cc: Radu Caragea <sinaelgl@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-21ARM: tegra: always enable USB VBUS regulatorsStephen Warren3-0/+8
This fixes a regression exposed during the merge window by commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that USB VBUS doesn't get turned on, so USB devices are not detected. This affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to which the SSD is connected) and the external port(s) on Seaboard/ Springbank and Whistler. The Tegra DT as written in v3.11 allows two paths to enable USB VBUS: 1) Via the legacy DT binding for the USB controller; it can directly acquire a VBUS GPIO and activate it. 2) Via a regulator for VBUS, which is referenced by the new DT binding for the USB controller. Those two methods both use the same GPIO, and hence whichever of the USB controller and regulator gets probed first ends up owning the GPIO. In practice, the USB driver only supports path (1) above, since the patches to support the new USB binding are not present until v3.12:-( In practice, the regulator ends up being probed first and owning the GPIO. Since nothing enables the regulator (the USB driver code is not yet present), the regulator ends up being turned off. This originally caused no problem, because the polarity in the regulator definition was incorrect, so attempting to turn off the regulator actually turned it on, and everything worked:-( However, when testing the new USB driver code in v3.12, I noticed the incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT". In the context of v3.11, this patch then caused the USB VBUS to actually turn off, which broke USB ports with VBUS control. I got this patch included in v3.11-rc1 since it fixed a bug in device tree (incorrect polarity specification), and hence was suitable to be included early in the rc series. I evidently did not test the patch at all, or correctly, in the context of v3.11, and hence did not notice the issue that I have explained above:-( Fix this by making the USB VBUS regulators always enabled. This way, if the regulator owns the GPIO, it will always be turned on, even if there is no USB driver code to request the regulator be turned on. Even ignoring this bug, this is a reasonable way to configure the HW anyway. If this patch is applied to v3.11, it will cause a couple pretty trivial conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since the context right above the added lines changed in patches destined for v3.12. Reported-by: Kyle McMartin <kmcmarti@redhat.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-21Merge tag 'stable/for-linus-3.11-rc6-tag' of ↵Linus Torvalds3-2/+32
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull Xen bug-fixes from Konrad Rzeszutek Wilk: - On ARM did not have balanced calls to get/put_cpu. - Fix to make tboot + Xen + Linux correctly. - Fix events VCPU binding issues. - Fix a vCPU online race where IPIs are sent to not-yet-online vCPU. * tag 'stable/for-linus-3.11-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen/smp: initialize IPI vectors before marking CPU online xen/events: mask events when changing their VCPU binding xen/events: initialize local per-cpu mask for all possible events x86/xen: do not identity map UNUSABLE regions in the machine E820 xen/arm: missing put_cpu in xen_percpu_init
2013-08-21Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-0/+26
Pull MIPS fix from Ralf Baechle: "Just a single patch which fixes a special case in the MIPS FPU emulator which is always required, even on CPUs with FPU. There is the rare special case that an FPU (or certain other instructions) in a branch delay slot is causing an exception and then the branch instruction will need to be emulated by the kernel before resuming execution. This is working great except if the branch instruction is an Octeon BBIT instruction. The boring disclaimer - all MIPS defconfigs build tested and no regressions and runtime tested on Octeon, no known issues" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Handle OCTEON BBIT instructions in FPU emulator.
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