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2019-08-23MIPS: msp: Record prom memoryJiaxun Yang1-6/+16
boot_mem_map is nolonger exist so we need to maintain a list of prom memory by ourselves Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
2019-08-23MIPS: malta: Drop prom_free_prom_memoryJiaxun Yang1-11/+0
Current prom_free_prom_memory is freeing maps marked as BOOT_MEM_ROM_DATA, however, nobody is exactly setting this type for malta. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
2019-08-23MIPS: fw: Record prom memoryJiaxun Yang1-6/+18
boot_mem_map is nolonger exist so we need to maintain a list of prom memory by ourselves. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
2019-08-23MIPS: OCTEON: Drop boot_mem_mapJiaxun Yang2-12/+8
Replace walk through boot_mem_map with for_each_memblock. And remove the check of total boot_mem_map. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: yasha.che3@gmail.com Cc: aurelien@aurel32.net Cc: sfr@canb.auug.org.au Cc: fancer.lancer@gmail.com Cc: matt.redfearn@mips.com Cc: chenhc@lemote.com
2019-08-19MIPS: Octeon: Fix a typo in #define OCTOEN_SERIAL_LENChristophe JAILLET1-2/+2
It should be OCTEON_SERIAL_LEN. Update the #define and use it accordingly Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: kernel-janitors@vger.kernel.org
2019-08-11MIPS: tlbex: Explicitly cast _PAGE_NO_EXEC to a booleanNathan Chancellor1-1/+1
clang warns: arch/mips/mm/tlbex.c:634:19: error: use of logical '&&' with constant operand [-Werror,-Wconstant-logical-operand] if (cpu_has_rixi && _PAGE_NO_EXEC) { ^ ~~~~~~~~~~~~~ arch/mips/mm/tlbex.c:634:19: note: use '&' for a bitwise operation if (cpu_has_rixi && _PAGE_NO_EXEC) { ^~ & arch/mips/mm/tlbex.c:634:19: note: remove constant to silence this warning if (cpu_has_rixi && _PAGE_NO_EXEC) { ~^~~~~~~~~~~~~~~~ 1 error generated. Explicitly cast this value to a boolean so that clang understands we intend for this to be a non-zero value. Fixes: 00bf1c691d08 ("MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields") Link: https://github.com/ClangBuiltLinux/linux/issues/609 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: clang-built-linux@googlegroups.com
2019-08-11MIPS/ptrace: Update mips_get_syscall_arg's return typeNathan Chancellor1-14/+7
clang warns: arch/mips/include/asm/syscall.h:136:3: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized] ret |= mips_get_syscall_arg(args++, task, regs, i++); ^~~ arch/mips/include/asm/syscall.h:129:9: note: initialize the variable 'ret' to silence this warning int ret; ^ = 0 1 error generated. It's not wrong; however, it's not an issue in practice because ret is only assigned to, not read from. ret could just be initialized to zero but looking into it further, ret has been unused since it was first added in 2012 so just get rid of it and update mips_get_syscall_arg's return type since none of the return values are ever checked. If it is ever needed again, this commit can be reverted and ret can be properly initialized. Fixes: c0ff3c53d4f9 ("MIPS: Enable HAVE_ARCH_TRACEHOOK.") Link: https://github.com/ClangBuiltLinux/linux/issues/604 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: clang-built-linux@googlegroups.com
2019-08-11MIPS: Don't use bc_false uninitialized in __mm_isBranchInstrNathan Chancellor1-1/+1
clang warns: arch/mips/kernel/branch.c:148:8: error: variable 'bc_false' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized] case mm_bc2t_op: ^~~~~~~~~~ arch/mips/kernel/branch.c:157:8: note: uninitialized use occurs here if (bc_false) ^~~~~~~~ arch/mips/kernel/branch.c:149:8: error: variable 'bc_false' is used uninitialized whenever switch case is taken [-Werror,-Wsometimes-uninitialized] case mm_bc1t_op: ^~~~~~~~~~ arch/mips/kernel/branch.c:157:8: note: uninitialized use occurs here if (bc_false) ^~~~~~~~ arch/mips/kernel/branch.c:142:4: note: variable 'bc_false' is declared here int bc_false = 0; ^ 2 errors generated. When mm_bc1t_op and mm_bc2t_op are taken, the bc_false initialization does not happen, which leads to a garbage value upon use, as illustrated below with a small sample program. $ mipsel-linux-gnu-gcc --version | head -n1 mipsel-linux-gnu-gcc (Debian 8.3.0-2) 8.3.0 $ clang --version | head -n1 ClangBuiltLinux clang version 9.0.0 (git://github.com/llvm/llvm-project 544315b4197034a3be8acd12cba56a75fb1f08dc) (based on LLVM 9.0.0svn) $ cat test.c #include <stdio.h> static void switch_scoped(int opcode) { switch (opcode) { case 1: case 2: { int bc_false = 0; bc_false = 4; case 3: case 4: printf("\t* switch scoped bc_false = %d\n", bc_false); } } } static void function_scoped(int opcode) { int bc_false = 0; switch (opcode) { case 1: case 2: { bc_false = 4; case 3: case 4: printf("\t* function scoped bc_false = %d\n", bc_false); } } } int main(void) { int opcode; for (opcode = 1; opcode < 5; opcode++) { printf("opcode = %d:\n", opcode); switch_scoped(opcode); function_scoped(opcode); printf("\n"); } return 0; } $ mipsel-linux-gnu-gcc -std=gnu89 -static test.c && \ qemu-mipsel a.out opcode = 1: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 2: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 3: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 opcode = 4: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 $ clang -std=gnu89 --target=mipsel-linux-gnu -m32 -static test.c && \ qemu-mipsel a.out opcode = 1: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 2: * switch scoped bc_false = 4 * function scoped bc_false = 4 opcode = 3: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 opcode = 4: * switch scoped bc_false = 2147483004 * function scoped bc_false = 0 Move the definition up so that we get the right behavior and mark it __maybe_unused as it will not be used when CONFIG_MIPS_FP_SUPPORT isn't enabled. Fixes: 6a1cc218b9cc ("MIPS: branch: Remove FP branch handling when CONFIG_MIPS_FP_SUPPORT=n") Link: https://github.com/ClangBuiltLinux/linux/issues/603 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: clang-built-linux@googlegroups.com
2019-08-08Merge branch 'ingenic-tcu-v5.4' into mips-nextPaul Burton7-150/+92
Merge the Ingenic TCU patchset from the ingenic-tcu-v5.4 branch which was created to enable follow-on changes in other subsystems. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-08-08MIPS: jz4740: Drop obsolete codePaul Cercueil1-149/+2
The old clocksource/timer platform code is now obsoleted by the newly introduced TCU drivers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: GCW0: Reduce system timer and clocksource to 750 kHzPaul Cercueil1-0/+10
The default clock (12 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: CI20: Reduce system timer and clocksource to 3 MHzPaul Cercueil1-0/+7
The default clock (48 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHzPaul Cercueil1-0/+7
The default clock (12 MHz) is too fast for the system timer, which fails to report time accurately. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: jz4740: Add DTS nodes for the TCU driversPaul Cercueil3-0/+66
Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-06mips: fix vdso32 build, againArnd Bergmann2-10/+1
The generic vdso support adds the same #if hack in two places, asm/vdso/vdso.h and config-n32-o32-env.c, but only the second is actually used. The result lacks the BUILD_VDSO32_64 macro, and that triggers a build error: ./include/linux/page-flags-layout.h:95:2: error: #error "Not enough bits in page flags" Move the macro into the other place, and remove the duplicated bits. Reported-by: Guenter Roeck <linux@roeck-us.net> Fixes: ee38d94a0ad8 ("page flags: prioritize kasan bits over last-cpuid") Fixes: 24640f233b46 ("mips: Add support for generic vDSO") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andrey Konovalov <andreyknvl@google.com> Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Christoph Lameter <cl@linux.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-08-06MIPS: octeon: Remove ARCH_HAS_IRQ_PER_CPUPaul Burton1-1/+0
ARCH_HAS_IRQ_PER_CPU is unused anywhere in the kernel - remove the definition. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-08-06MIPS: octeon: Remove cpu_has_saaPaul Burton1-8/+0
The cpu_has_saa feature macro was added along with Cavium Octeon CPU support back in commit 5b3b16880f40 ("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.") but has never been used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-08-05MIPS: Ingenic: Disable broken BTB lookup optimization.Zhou Yanjie2-0/+11
In order to further reduce power consumption, the XBurst core by default attempts to avoid branch target buffer lookups by detecting & special casing loops. This feature will cause BogoMIPS and lpj calculate in error. Set cp0 config7 bit 4 to disable this feature. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: malat@debian.org Cc: gregkh@linuxfoundation.org Cc: tglx@linutronix.de Cc: allison@lohutok.net Cc: syq@debian.org Cc: chenhc@lemote.com Cc: jiaxun.yang@flygoat.com
2019-08-05MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache.Zhou Yanjie1-7/+20
1.fix bugs when detecting L2 cache sets value. 2.fix bugs when detecting L2 cache ways value. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: malat@debian.org Cc: gregkh@linuxfoundation.org Cc: tglx@linutronix.de Cc: allison@lohutok.net Cc: syq@debian.org Cc: chenhc@lemote.com Cc: jiaxun.yang@flygoat.com
2019-07-30mips: remove nargs from __SYSCALLFiroz Khan5-6/+6
The __SYSCALL macro's arguments are system call number, system call entry name and number of arguments for the system call. Argument- nargs in __SYSCALL(nr, entry, nargs) is neither calculated nor used anywhere. So it would be better to keep the implementaion as __SYSCALL(nr, entry). This will unifies the implementation with some other architetures too. Signed-off-by: Firoz Khan <firoz.khan@linaro.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: y2038@lists.linaro.org Cc: linux-kernel@vger.kernel.org Cc: linux-arch@vger.kernel.org Cc: arnd@arndb.de Cc: deepa.kernel@gmail.com Cc: marcin.juszkiewicz@linaro.org
2019-07-30MIPS: jz4740: Drop dead codePaul Cercueil8-370/+2
Remove all the source files that are not used anywhere anymore. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-30MIPS: configs: LB60: update defconfigPaul Cercueil1-22/+22
Update the defconfig to select the new drivers instead of the old ones. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-30MIPS: qi_lb60: Migrate to devicetreePaul Cercueil3-496/+287
Move all the platform data to devicetree. The only bit dropped is the PWM beeper, which requires the PWM driver to be updated. I figured it's okay to remove it here since it's really a non-critical device, and it'll be re-introduced soon enough. The other change is the CS line of the SPI is now set as active low. The SPI core would have forced "active low" anyway, unless the 'spi-cs-high' property is set. In the process of moving to devicetree, we also switched to new drivers: - We use the simple-audio-card and simple-amplifier drivers instead of the custom ASoC code; - We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0 DRM panel driver instead of the old framebuffer driver; - We use the new jz4780-dma driver instead of the old jz4740-dma one; - We use the ingenic-nand and jz4740-ecc drivers instead of the old jz4740-nand driver; - We use ingenic-battery instead of jz4740-battery; - We use iio-hwmon instead of jz4740-hwmon; - We use ingenic-iio instead of the old jz4740-adc MFD driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> [paul.burton@mips.com: Drop the unused & undocumented ili8960 spi@0 node.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-30MIPS: DTS: jz4740: Add missing nodesPaul Cercueil1-0/+84
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory, and BCH controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-30MIPS: Kconfig: remove HAVE_LATENCYTOP_SUPPORTFabian Mewes1-4/+0
HAVE_LATENCYTOP_SUPPORT was removed all together in commit da48d094ce5d7 ("Kconfig: remove HAVE_LATENCYTOP_SUPPORT"). This commit removes a leftover in the MIPS Kconfig. Signed-off-by: Fabian Mewes <architekt@coding4coffee.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-30MIPS: X1000: Add X1000 system type.Zhou Yanjie3-1/+6
Add X1000 system type for cat /proc/cpuinfo to give out X1000. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org Cc: paul@crapouillou.net Cc: jhogan@kernel.org Cc: fancer.lancer@gmail.com Cc: chenhc@lemote.com Cc: tglx@linutronix.de Cc: gregkh@linuxfoundation.org Cc: armijn@tjaldur.nl Cc: syq@debian.org Cc: jiaxun.yang@flygoat.com
2019-07-26mips: vdso: Fix flip/flop vdso building bugVincenzo Frascino1-7/+7
Running "make" on an already compiled kernel tree will rebuild the vdso library even if this has not been modified. $ make GEN Makefile Using linux as source for kernel CALL linux/scripts/atomic/check-atomics.sh CALL linux/scripts/checksyscalls.sh <stdin>:1511:2: warning: #warning syscall clone3 not implemented [-Wcpp] CHK include/generated/compile.h VDSO arch/mips/vdso/vdso.so.dbg.raw OBJCOPY arch/mips/vdso/vdso.so.raw GENVDSO arch/mips/vdso/vdso-image.c CC arch/mips/vdso/vdso-image.o AR arch/mips/vdso/built-in.a AR arch/mips/built-in.a CHK include/generated/autoksyms.h GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o AR init/built-in.a LD vmlinux.o MODPOST vmlinux.o MODINFO modules.builtin.modinfo KSYM .tmp_kallsyms1.o KSYM .tmp_kallsyms2.o LD vmlinux SORTEX vmlinux SYSMAP System.map Building modules, stage 2. ITS arch/mips/boot/vmlinux.gz.its OBJCOPY arch/mips/boot/vmlinux.bin MODPOST 7 modules GZIP arch/mips/boot/vmlinux.bin.gz ITB arch/mips/boot/vmlinux.gz.itb The issue is generated by the fact that "if_changed" is called twice in a single target. Fix the build bug merging the two commands into a single function. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-26mips: vdso: Fix source pathVincenzo Frascino1-2/+2
The vdso library for o32 and n32 does not compile compile correctly when building outside of the source tree due to a wrong inclusion path for config-n32-o32-env.c resulting in the error below: cc1: fatal error: arch/mips/vdso/config-n32-o32-env.c: No such file or dnirectory compilation terminated. arch/mips/vdso/Makefile:153: recipe for target 'arch/mips/vdso/vgettimeofday-o32.o' failed make[3]: *** [arch/mips/vdso/vgettimeofday-o32.o] Error 1 scripts/Makefile.build:490: recipe for target 'arch/mips/vdso' failed Fix the config-n32-o32-env.c inclusion path prepending the $(srctree) variable. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> [paul.burton@mips.com: Note that this occurs specifically when building outside of the source tree.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-25MIPS: BCM47XX: Add support for Netgear R6200 V1Edward Matijević3-0/+12
The Netgear R6200 v1 uses a BCM4718A1 SOC and a BCM4352/BCM4360 for 5GHz wireless. This patch adds support for detecting this model board and registers the 3 buttons. I have tested that the device can boot kernels 4.14 and 4.19 under OpenWRT. There is one issue that the LEDs on the device are controlled by a 74HC164 that uses bit-banging instead of SPI so it isn't accessible to the kernel without adding a workaround. Without any workaround the device on boot will flash all LEDs once then the power LED will remain amber as all other LEDs stay off. Signed-off-by: Edward Matijevic <motolav@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> [paul.burton@mips.com: - Sort bcm47xx_board_list_board_id alphabetically by board type. - Fix whitespace. - Wrap commit message & drop OpenWRT-based justification for bcm47xx_board_list_board_id being mis-sorted.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-25mips: Add clock_gettime64 entry pointVincenzo Frascino2-0/+9
With the release of Linux 5.1 has been added a new syscall, clock_gettime64, that provided a 64 bit time value for a specified clock_ID to make the kernel Y2038 safe on 32 bit architectures. Update the mips32 specific vDSO library accordingly with what it has been done for the kernel syscall exposing the clock_gettime64 entry point. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-25mips: Add clock_getres entry pointVincenzo Frascino3-0/+39
The generic vDSO library provides an implementation of clock_getres() that can be leveraged by each architecture. Add clock_getres() entry point on mips. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-25mips: Add support for generic vDSOVincenzo Frascino11-115/+296
The mips vDSO library requires some adaptations to take advantage of the newly introduced generic vDSO library. Introduce the following changes: - Modification of vdso.c to be compliant with the common vdso datapage - Use of lib/vdso for gettimeofday Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> [paul.burton@mips.com: Prepend $(src) to config-n32-o32-env.c path.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-23MIPS: Remove unused R8000 CPU supportPaul Burton10-293/+5
Our R8000 CPU support can only be included if a system selects CONFIG_SYS_HAS_CPU_R8000. No system does, making all R8000-related CPU support dead code. Remove it. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-07-23MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton14-28/+0
R5432_CP0_INTERRUPT_WAR is defined as 0 for every system we support, and so the workaround is never used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-07-23MIPS: Remove unused R5432 CPU supportPaul Burton8-30/+1
Our R5432 CPU support can only be included if a system selects CONFIG_SYS_HAS_CPU_R5432. No system does, making all R5432-related CPU support dead code. Remove it. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-07-23MIPS: Remove unused R4300 CPU supportPaul Burton9-33/+1
Our R4300 CPU support can only be included if a system selects CONFIG_SYS_HAS_CPU_R4300. No system does, making all R4300-related CPU support dead code. Remove it. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-07-22MIPS: qi_lb60: Move MMC configuration to devicetreePaul Cercueil2-32/+33
Move the MMC configuration from the board C file to devicetree. The 'power' GPIO was removed and instead the vmmc regulator is used, to follow the changes introduced in the jz4740-mmc driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-21MIPS: pte_special()/pte_mkspecial() supportDmitry Korotin3-2/+20
Add support for pte_special() & pte_mkspecial(), replacing our previous stubs with functional implementations. Signed-off-by: Dmitry Korotin <dkorotin@wavecomp.com> [paul.burton@mips.com: - Fix for CONFIG_PHYS_ADDR_T_64BIT && CONFIG_CPU_MIPS32. - Rewrite commit message.] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-07-21MIPS: BMIPS: add clock controller nodesJonas Gorski6-15/+51
Now that we have a driver for the clock controller, add nodes to allow devices to make use of it. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org>
2019-07-21MIPS: DTS: jz4740: Add node for the MMC driverPaul Cercueil1-3/+18
Add a devicetree node for the jz4740-mmc driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mmc@vger.kernel.org
2019-07-21MIPS: Decode config3 register on Ingenic SoCsPaul Cercueil1-0/+8
XBurst misses a config2 register, so config3 decode was skipped in decode_configs(). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: Rename JZRISC to XBURSTPaul Cercueil6-9/+9
The real name of the CPU present in the JZ line of SoCs from Ingenic is XBurst, not JZRISC. Signed-off-by: Paul Cercueil <paul@crapouillou.net> [paul.burton@mips.com: Leave /proc/cpuinfo string as-is.] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: Undefine PMD_ORDER for 32-bit buildsDaniel Silsby1-1/+1
During an update long ago to conform to 4-level page code, PMD_ORDER was changed from 0 to 1, despite the fact that a PMD table is not used at all in a 32-bit MIPS build. PMD_ORDER does not seem to be used in these builds. Now, it matches PUD_ORDER, a nonsense #define to give a build failure with informative error. The older commit that had redefined PMD_ORDER was commit c6e8b587718c ("Update MIPS to use the 4-level pagetable code thereby getting rid of the compacrapability headers.") Signed-off-by: Daniel Silsby <dansilsby@gmail.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: ingenic: Add support for huge pagesDaniel Silsby1-0/+1
The Ingenic jz47xx SoC series of 32-bit MIPS CPUs support huge pages. Signed-off-by: Daniel Silsby <dansilsby@gmail.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: Decouple CPU_SUPPORTS_HUGEPAGES from 64BITDaniel Silsby1-2/+2
We now have partial 32-bit MIPS huge page support, so there's no need to restrict these config options only to 64-bit systems. Signed-off-by: Daniel Silsby <dansilsby@gmail.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: Add partial 32-bit huge page supportDaniel Silsby3-7/+73
This adds initial support for huge pages to 32-bit MIPS systems. Systems with extended addressing enabled (EVA,XPA,Alchemy/Netlogic) are not yet supported. With huge pages enabled, this implementation will increase page table memory overhead to match that of a 64-bit MIPS system. However, the cache-friendliness of page table walks is not affected significantly. Signed-off-by: Daniel Silsby <dansilsby@gmail.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21MIPS: Disallow CPU_SUPPORTS_HUGEPAGES for XPA,EVADaniel Silsby1-0/+1
In preparation for 32-bit MIPS huge page support. EVA,XPA are extended-addressing modes for 32-bit MIPS systems. Because huge pages aren't currently supported in 32-bit MIPS, this doesn't take any features away from EVA,XPA-enabled systems. However, the soon-to- come 32-bit MIPS huge page support doesn't yet support them. This also disables CPU_SUPPORTS_HUGEPAGES for the small number of 32-bit MIPS CPUs from Alchemy/Netlogic that support a custom 36-bit extended addressing. It's unknown if they even support huge pages in hardware. Signed-off-by: Daniel Silsby <dansilsby@gmail.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-07-21hexagon: switch to generic version of pte allocationMike Rapoport1-32/+2
The hexagon implementation pte_alloc_one(), pte_alloc_one_kernel(), pte_free_kernel() and pte_free() is identical to the generic except of lack of __GFP_ACCOUNT for the user PTEs allocation. Switch hexagon to use generic version of these functions. Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-07-20Merge tag 'dma-mapping-5.3-1' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds4-1/+38
Pull dma-mapping fixes from Christoph Hellwig: "Fix various regressions: - force unencrypted dma-coherent buffers if encryption bit can't fit into the dma coherent mask (Tom Lendacky) - avoid limiting request size if swiotlb is not used (me) - fix swiotlb handling in dma_direct_sync_sg_for_cpu/device (Fugang Duan)" * tag 'dma-mapping-5.3-1' of git://git.infradead.org/users/hch/dma-mapping: dma-direct: correct the physical addr in dma_direct_sync_sg_for_cpu/device dma-direct: only limit the mapping size if swiotlb could be used dma-mapping: add a dma_addressing_limited helper dma-direct: Force unencrypted DMA under SME for certain DMA masks
2019-07-20Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds31-195/+218
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A set of x86 specific fixes and updates: - The CR2 corruption fixes which store CR2 early in the entry code and hand the stored address to the fault handlers. - Revert a forgotten leftover of the dropped FSGSBASE series. - Plug a memory leak in the boot code. - Make the Hyper-V assist functionality robust by zeroing the shadow page. - Remove a useless check for dead processes with LDT - Update paravirt and VMware maintainers entries. - A few cleanup patches addressing various compiler warnings" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/entry/64: Prevent clobbering of saved CR2 value x86/hyper-v: Zero out the VP ASSIST PAGE on allocation x86, boot: Remove multiple copy of static function sanitize_boot_params() x86/boot/compressed/64: Remove unused variable x86/boot/efi: Remove unused variables x86/mm, tracing: Fix CR2 corruption x86/entry/64: Update comments and sanity tests for create_gap x86/entry/64: Simplify idtentry a little x86/entry/32: Simplify common_exception x86/paravirt: Make read_cr2() CALLEE_SAVE MAINTAINERS: Update PARAVIRT_OPS_INTERFACE and VMWARE_HYPERVISOR_INTERFACE x86/process: Delete useless check for dead process with LDT x86: math-emu: Hide clang warnings for 16-bit overflow x86/e820: Use proper booleans instead of 0/1 x86/apic: Silence -Wtype-limits compiler warnings x86/mm: Free sme_early_buffer after init x86/boot: Fix memory leak in default_get_smp_config() Revert "x86/ptrace: Prevent ptrace from clearing the FS/GS selector" and fix the test
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 10:17:40 +0000