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2020-06-11x86/mce: Address objtools noinstr complaintsThomas Gleixner3-7/+21
2020-06-11x86/traps: Address objtool noinstr complaints in #DBThomas Gleixner1-2/+8
2020-06-11x86/traps: Restructure #DB handlingThomas Gleixner1-34/+35
2020-06-11x86/entry: Implement user mode C entry points for #DB and #MCEThomas Gleixner3-24/+88
2020-06-11x86/idtentry: Provide IDTRENTRY_NOIST variants for #DB and #MCThomas Gleixner1-2/+17
2020-06-11x86/entry/64: Remove error code clearing from #DB and #MCE ASM stubThomas Gleixner1-1/+0
2020-06-11x86/entry: Convert Debug exception to IDTENTRY_DBThomas Gleixner8-30/+24
2020-06-11x86/db: Split out dr6/7 handlingPeter Zijlstra2-24/+57
2020-06-11x86/nmi: Protect NMI entry against instrumentationThomas Gleixner3-14/+15
2020-06-11x86/entry: Convert NMI to IDTENTRY_NMIThomas Gleixner8-22/+25
2020-06-11x86/idtentry: Provide IDTENTRY_XEN for XEN/PVThomas Gleixner1-0/+16
2020-06-11x86/mce: Use untraced rd/wrmsr in the MCE offline/crash checkThomas Gleixner1-2/+2
2020-06-11x86/entry: Convert Machine Check to IDTENTRY_ISTThomas Gleixner15-43/+33
2020-06-11x86/mce: Move nmi_enter/exit() into the entry pointThomas Gleixner3-21/+13
2020-06-11x86/idtentry: Provide IDTENTRY_ISTThomas Gleixner1-0/+54
2020-06-11x86/traps: Split int3 handler upPeter Zijlstra1-28/+40
2020-06-11x86/entry: Convert INT3 exception to IDTENTRY_RAWThomas Gleixner8-26/+23
2020-06-11x86/idtentry: Provide IDTENTRY_RAWThomas Gleixner1-0/+31
2020-06-11x86/int3: Inline bsearch()Peter Zijlstra2-4/+9
2020-06-11x86/int3: Avoid atomic instrumentationPeter Zijlstra1-3/+3
2020-06-11x86/int3: Ensure that poke_int3_handler() is not tracedThomas Gleixner3-12/+14
2020-06-11x86/entry/32: Convert IRET exception to IDTENTRY_SWThomas Gleixner5-16/+21
2020-06-11x86/entry: Convert SIMD coprocessor error exception to IDTENTRYThomas Gleixner8-33/+21
2020-06-11x86/entry: Convert Alignment check exception to IDTENTRYThomas Gleixner8-16/+5
2020-06-11x86/entry: Convert Coprocessor error exception to IDTENTRYThomas Gleixner8-17/+6
2020-06-11x86/entry: Convert Spurious interrupt bug exception to IDTENTRYThomas Gleixner8-16/+5
2020-06-11x86/entry: Convert General protection exception to IDTENTRYThomas Gleixner8-20/+9
2020-06-11x86/entry: Convert Stack segment exception to IDTENTRYThomas Gleixner8-21/+8
2020-06-11x86/entry: Convert Segment not present exception to IDTENTRYThomas Gleixner8-14/+10
2020-06-11x86/entry: Convert Invalid TSS exception to IDTENTRYThomas Gleixner8-14/+12
2020-06-11x86/idtentry: Provide IDTENTRY_ERRORCODEThomas Gleixner1-0/+46
2020-06-11x86/entry: Convert Coprocessor segment overrun exception to IDTENTRYThomas Gleixner8-15/+10
2020-06-11x86/entry: Convert Device not available exception to IDTENTRYThomas Gleixner8-20/+6
2020-06-11x86/entry: Convert Invalid Opcode exception to IDTENTRYThomas Gleixner9-16/+25
2020-06-11x86/entry: Convert Bounds exception to IDTENTRYThomas Gleixner8-19/+8
2020-06-11x86/entry: Convert Overflow exception to IDTENTRYThomas Gleixner8-15/+9
2020-06-11x86/entry: Convert Divide Error to IDTENTRYThomas Gleixner8-15/+26
2020-06-11x86/traps: Prepare for using DEFINE_IDTENTRYThomas Gleixner1-0/+15
2020-06-11x86/entry/common: Provide idtentry_enter/exit()Thomas Gleixner2-0/+102
2020-06-11x86/idtentry: Provide macros to define/declare IDT entry pointsThomas Gleixner4-1/+80
2020-06-11x86/entry/32: Provide macro to emit IDT entry stubsThomas Gleixner1-0/+68
2020-06-11x86/entry/64: Provide sane error entry/exitThomas Gleixner1-3/+19
2020-06-11x86/entry: Distangle idtentryThomas Gleixner1-183/+220
2020-06-11x86/entry/64: Reorder idtentriesThomas Gleixner1-19/+17
2020-06-11x86/traps: Split trap numbers out in a separate headerThomas Gleixner2-25/+32
2020-06-11x86/traps: Make interrupt enable/disable symmetric in C codeThomas Gleixner2-11/+32
2020-06-11x86/entry/64: Use native swapgs in asm_load_gs_index()Thomas Gleixner1-3/+3
2020-06-11x86/entry: Disable interrupts for native_load_gs_index() in C codeThomas Gleixner2-10/+15
2020-06-11x86/traps: Mark sync_regs() noinstrThomas Gleixner1-2/+1
2020-06-11x86/traps: Mark fixup_bad_iret() noinstrThomas Gleixner1-7/+9