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linux
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mmu_gather-race-fix
n900-dt
n900-dt-with-ssi
n900-dts-twl5030
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n900-omapdrm
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sc18is600
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Linux Kernel (branches are rebased on master from time to time)
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Age
Commit message (
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Author
Files
Lines
2020-06-11
x86/mce: Address objtools noinstr complaints
Thomas Gleixner
3
-7
/
+21
2020-06-11
x86/traps: Address objtool noinstr complaints in #DB
Thomas Gleixner
1
-2
/
+8
2020-06-11
x86/traps: Restructure #DB handling
Thomas Gleixner
1
-34
/
+35
2020-06-11
x86/entry: Implement user mode C entry points for #DB and #MCE
Thomas Gleixner
3
-24
/
+88
2020-06-11
x86/idtentry: Provide IDTRENTRY_NOIST variants for #DB and #MC
Thomas Gleixner
1
-2
/
+17
2020-06-11
x86/entry/64: Remove error code clearing from #DB and #MCE ASM stub
Thomas Gleixner
1
-1
/
+0
2020-06-11
x86/entry: Convert Debug exception to IDTENTRY_DB
Thomas Gleixner
8
-30
/
+24
2020-06-11
x86/db: Split out dr6/7 handling
Peter Zijlstra
2
-24
/
+57
2020-06-11
x86/nmi: Protect NMI entry against instrumentation
Thomas Gleixner
3
-14
/
+15
2020-06-11
x86/entry: Convert NMI to IDTENTRY_NMI
Thomas Gleixner
8
-22
/
+25
2020-06-11
x86/idtentry: Provide IDTENTRY_XEN for XEN/PV
Thomas Gleixner
1
-0
/
+16
2020-06-11
x86/mce: Use untraced rd/wrmsr in the MCE offline/crash check
Thomas Gleixner
1
-2
/
+2
2020-06-11
x86/entry: Convert Machine Check to IDTENTRY_IST
Thomas Gleixner
15
-43
/
+33
2020-06-11
x86/mce: Move nmi_enter/exit() into the entry point
Thomas Gleixner
3
-21
/
+13
2020-06-11
x86/idtentry: Provide IDTENTRY_IST
Thomas Gleixner
1
-0
/
+54
2020-06-11
x86/traps: Split int3 handler up
Peter Zijlstra
1
-28
/
+40
2020-06-11
x86/entry: Convert INT3 exception to IDTENTRY_RAW
Thomas Gleixner
8
-26
/
+23
2020-06-11
x86/idtentry: Provide IDTENTRY_RAW
Thomas Gleixner
1
-0
/
+31
2020-06-11
x86/int3: Inline bsearch()
Peter Zijlstra
2
-4
/
+9
2020-06-11
x86/int3: Avoid atomic instrumentation
Peter Zijlstra
1
-3
/
+3
2020-06-11
x86/int3: Ensure that poke_int3_handler() is not traced
Thomas Gleixner
3
-12
/
+14
2020-06-11
x86/entry/32: Convert IRET exception to IDTENTRY_SW
Thomas Gleixner
5
-16
/
+21
2020-06-11
x86/entry: Convert SIMD coprocessor error exception to IDTENTRY
Thomas Gleixner
8
-33
/
+21
2020-06-11
x86/entry: Convert Alignment check exception to IDTENTRY
Thomas Gleixner
8
-16
/
+5
2020-06-11
x86/entry: Convert Coprocessor error exception to IDTENTRY
Thomas Gleixner
8
-17
/
+6
2020-06-11
x86/entry: Convert Spurious interrupt bug exception to IDTENTRY
Thomas Gleixner
8
-16
/
+5
2020-06-11
x86/entry: Convert General protection exception to IDTENTRY
Thomas Gleixner
8
-20
/
+9
2020-06-11
x86/entry: Convert Stack segment exception to IDTENTRY
Thomas Gleixner
8
-21
/
+8
2020-06-11
x86/entry: Convert Segment not present exception to IDTENTRY
Thomas Gleixner
8
-14
/
+10
2020-06-11
x86/entry: Convert Invalid TSS exception to IDTENTRY
Thomas Gleixner
8
-14
/
+12
2020-06-11
x86/idtentry: Provide IDTENTRY_ERRORCODE
Thomas Gleixner
1
-0
/
+46
2020-06-11
x86/entry: Convert Coprocessor segment overrun exception to IDTENTRY
Thomas Gleixner
8
-15
/
+10
2020-06-11
x86/entry: Convert Device not available exception to IDTENTRY
Thomas Gleixner
8
-20
/
+6
2020-06-11
x86/entry: Convert Invalid Opcode exception to IDTENTRY
Thomas Gleixner
9
-16
/
+25
2020-06-11
x86/entry: Convert Bounds exception to IDTENTRY
Thomas Gleixner
8
-19
/
+8
2020-06-11
x86/entry: Convert Overflow exception to IDTENTRY
Thomas Gleixner
8
-15
/
+9
2020-06-11
x86/entry: Convert Divide Error to IDTENTRY
Thomas Gleixner
8
-15
/
+26
2020-06-11
x86/traps: Prepare for using DEFINE_IDTENTRY
Thomas Gleixner
1
-0
/
+15
2020-06-11
x86/entry/common: Provide idtentry_enter/exit()
Thomas Gleixner
2
-0
/
+102
2020-06-11
x86/idtentry: Provide macros to define/declare IDT entry points
Thomas Gleixner
4
-1
/
+80
2020-06-11
x86/entry/32: Provide macro to emit IDT entry stubs
Thomas Gleixner
1
-0
/
+68
2020-06-11
x86/entry/64: Provide sane error entry/exit
Thomas Gleixner
1
-3
/
+19
2020-06-11
x86/entry: Distangle idtentry
Thomas Gleixner
1
-183
/
+220
2020-06-11
x86/entry/64: Reorder idtentries
Thomas Gleixner
1
-19
/
+17
2020-06-11
x86/traps: Split trap numbers out in a separate header
Thomas Gleixner
2
-25
/
+32
2020-06-11
x86/traps: Make interrupt enable/disable symmetric in C code
Thomas Gleixner
2
-11
/
+32
2020-06-11
x86/entry/64: Use native swapgs in asm_load_gs_index()
Thomas Gleixner
1
-3
/
+3
2020-06-11
x86/entry: Disable interrupts for native_load_gs_index() in C code
Thomas Gleixner
2
-10
/
+15
2020-06-11
x86/traps: Mark sync_regs() noinstr
Thomas Gleixner
1
-2
/
+1
2020-06-11
x86/traps: Mark fixup_bad_iret() noinstr
Thomas Gleixner
1
-7
/
+9
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