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2010-03-19perf, x86: Fix key indexing in Pentium-4 PMULin Ming1-1/+1
2010-03-18x86, perf: Fix few cosmetic dabs for P4 pmu (comments and constantify)Cyrill Gorcunov2-3/+3
2010-03-18perf_events: Fix resource leak in x86 __hw_perf_event_init()Stephane Eranian1-1/+4
2010-03-18perf, x86: Add cache events for the Pentium-4 PMULin Ming3-6/+159
2010-03-18perf, x86: Add a key to simplify template lookup in Pentium-4 PMULin Ming2-53/+38
2010-03-18x86, perf: Use apic_write unconditionallyCyrill Gorcunov2-6/+0
2010-03-18x86, apic: Allow to use certain functions without APIC built-in supportCyrill Gorcunov1-2/+11
2010-03-17perf/core, x86: Remove duplicate perf_event_mask variableRobert Richter1-6/+3
2010-03-17perf/core, x86: Remove cpu_hw_events.interruptsRobert Richter1-1/+0
2010-03-17perf/core, x86: Reduce number of CONFIG_X86_LOCAL_APIC macrosRobert Richter1-6/+9
2010-03-17perf, x86: Report error code that returned from x86_pmu.hw_config()Robert Richter1-2/+3
2010-03-16kprobes: Hide CONFIG_OPTPROBES and set if arch supports optimized kprobesMasami Hiramatsu1-7/+2
2010-03-16x86, perf: Fix comments in Pentium-4 PMU definitionsLin Ming1-2/+3
2010-03-16perf: Fix unexported generic perf_arch_fetch_caller_regsFrederic Weisbecker1-1/+2
2010-03-15perf, x86: Enable not tagged retired instruction counting on P4sCyrill Gorcunov2-9/+7
2010-03-13x86, perf: Unmask LVTPC only if we have APIC supportedCyrill Gorcunov1-0/+2
2010-03-12Merge branch 'perf/x86' into perf/coreIngo Molnar7-23/+1361
2010-03-12Merge branch 'perf/urgent' into perf/coreIngo Molnar4-12/+34
2010-03-12x86, perf: Fix NULL deref on not assigned x86_pmuCyrill Gorcunov1-0/+3
2010-03-11perf, x86: Implement initial P4 PMU driverCyrill Gorcunov7-23/+1358
2010-03-11perf: export perf_trace_regs and perf_arch_fetch_caller_regsXiao Guangrong1-0/+1
2010-03-11perf, x86: Fix hw_perf_enable() event assignmentPeter Zijlstra1-9/+3
2010-03-11perf, ppc: Fix compile error due to new cpu notifiersPeter Zijlstra1-1/+1
2010-03-10perf: Introduce new perf_fetch_caller_regs() for hot regs snapshotFrederic Weisbecker2-0/+27
2010-03-10perf/x86-64: Use frame pointer to walk on irq and process stacksFrederic Weisbecker1-2/+2
2010-03-10perf, x86: Fix the !CONFIG_CPU_SUP_INTEL buildIngo Molnar1-1/+1
2010-03-10perf, x86: Add INSTRUCTION_DECODER config flagIngo Molnar2-1/+4
2010-03-10perf, x86: Fix LBR read-outPeter Zijlstra1-2/+2
2010-03-10perf, x86: Fixup the PEBS handler for Core2 cpusPeter Zijlstra1-14/+24
2010-03-10perf, x86: Remove checking_{wr,rd}msr() usagePeter Zijlstra2-9/+20
2010-03-10perf, x86: Don't reset the LBR as frequentlyPeter Zijlstra1-5/+4
2010-03-10perf, x86: Fix silly bug in intel_pmu_pebs_{enable,disable}Peter Zijlstra1-5/+3
2010-03-10perf, x86: Deal with multiple state bits for pebs-fmt1Peter Zijlstra1-3/+13
2010-03-10perf, x86: Reorder intel_pmu_enable_all()Peter Zijlstra1-3/+2
2010-03-10perf, x86: Fix LBR enable/disable vs cpuc->enabledPeter Zijlstra1-3/+4
2010-03-10perf, x86: Fix PEBS enable/disable vs cpuc->enabledPeter Zijlstra1-2/+3
2010-03-10perf, x86: Fix pebs drainsPeter Zijlstra1-12/+3
2010-03-10perf, x86: Avoid double disable on throttle vs ioctl(PERF_IOC_DISABLE)Peter Zijlstra1-3/+2
2010-03-10perf, x86: Robustify PEBS fixupPeter Zijlstra1-2/+19
2010-03-10perf, x86: Clear the LBRs on initPeter Zijlstra2-2/+19
2010-03-10perf, x86: Disable PEBS on clovertown chipsPeter Zijlstra2-0/+31
2010-03-10perf, x86: Fix silly bug in data store buffer allocationPeter Zijlstra1-3/+1
2010-03-10x86: Move MAX_INSN_SIZE into asm/insn.hPeter Zijlstra3-3/+3
2010-03-10perf, x86: Expose the full PEBS record using PERF_SAMPLE_RAWPeter Zijlstra1-0/+14
2010-03-10perf, x86: Clean up IA32_PERF_CAPABILITIES usagePeter Zijlstra4-31/+42
2010-03-10perf, x86: use LBR for PEBS IP+1 fixupPeter Zijlstra4-39/+138
2010-03-10perf, x86: Implement simple LBR supportPeter Zijlstra3-0/+259
2010-03-10perf, x86: Add PEBS infrastructurePeter Zijlstra3-261/+669
2010-03-10perf, x86: Fix double enable callsPeter Zijlstra1-0/+4
2010-03-10perf, x86: Fix double disable callsPeter Zijlstra1-1/+2
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