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2014-01-28xtensa: fix fast_syscall_spill_registersChris Zankel1-209/+174
The original implementation could clobber registers under certain conditions. The Xtensa processor architecture uses windowed registers and the original implementation was using a4 as a temporary register, which under certain conditions could be register a0 of the oldest window frame, and didn't always restore the content correctly. By moving the _spill_registers routine inside the fast system call, it frees up one more register (the return address is not required anymore) for the spill routine. Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-25xtensa: save current register frame in fast_syscall_spill_registers_fixupMax Filippov1-0/+12
We need it saved because it contains a3 where we track which register windows we still need to spill, and fixup handler may call C exception handlers. Also fix comments. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-25xtensa: introduce spill_registers_kernel macroMax Filippov1-12/+48
Most in-kernel users want registers spilled on the kernel stack and don't require PS.EXCM to be set. That means that they don't need fixup routine and could reuse regular window overflow mechanism for that, which makes spill routine very simple. Cc: stable@vger.kernel.org Suggested-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-10-15xtensa: fix fast_syscall_spill_registers_fixupMax Filippov1-19/+30
fast_syscall_spill_registers_fixup was not correctly updated by the 'keep a3 and excsave1 on entry to exception handlers' patch: it doesn't preserve a3 that it gets on entry, breaking _spill_registers in case of page fault on stack during register spilling, leading to unhandled exception in kernel mode. Preserve a3 by saving it in the original _spill_registers stack frame's a3 during exception handling and restoring it afterwards. Also fix comments and function bounds annotations. Reported-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: new fast_alloca handlerMax Filippov1-152/+40
Instead of emulating movsp instruction in the kernel use window underflow handler to load missing register window and retry failed movsp. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: keep a3 and excsave1 on entry to exception handlersMax Filippov1-68/+47
Based on the SMP patch by Joe Taylor and subsequent fixes. Preserve exception table pointer (normally stored in excsave1 SR) as it cannot be easily restored in SMP environment. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: enable kernel preemptionMax Filippov1-28/+17
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: check thread flags atomically on return from user exceptionMax Filippov1-18/+21
Check pending signals and rescheduling thread flags with interrupts disabled, and don't enable them if no flags are set. Call trace_hardirqs_on after thread flags handling, so that rescheduling is done and hardirqs tracking flag is updated in the correct task context. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08xtensa: check TLB sanity on return to userspaceMax Filippov1-1/+8
- check that user TLB mappings correspond to the current page table; - check that TLB mapping VPN is in the kernel/user address range in accordance with its ASID. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-20xtensa: fix fast_store_prohibited _PAGE_WRITABLE_BIT testMax Filippov1-1/+6
Before _PAGE_WRITABLE_BIT test fast_store_prohibited must make sure that PTE is present. Otherwise 'writable' bit is undefined and may be reused in the 'file offset' or 'swap type' PTE fields. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09xtensa: disable IRQs while IRQ handler is runningMax Filippov1-41/+11
IRQ handlers are expected to run with IRQs disabled. See e.g. http://lwn.net/Articles/380931/ for a longer story. This was overlooked in the commit 2d1c645 xtensa: dispatch medium-priority interrupts Revert to old behavior and simplify interrupt entry and exit code. Interrupt handler still honours IRQ priority. do_notify_resume/schedule must be called with interrupts enabled, enable interrupts if we return from user exception. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09xtensa: add irq flags trace supportMax Filippov1-0/+32
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: add support for TLSChris Zankel1-1/+11
The Xtensa architecture provides a global register called THREADPTR for the purpose of Thread Local Storage (TLS) support. This allows us to use a fairly simple implementation, keeping the thread pointer in the regset and simply saving and restoring it upon entering/exiting the from user space. Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: add support for oprofiledann1-1/+1
Support call graph profiling. Keep upper two bits of PC unchanged through backtrace rather than take them from sp (a1). The stack pointer is usually in the same GB (same upper 2 bits) as PC, but technically doesn't always have to be (and might not in the future, when taking full advantage of MMU v3). Signed-off-by: Dan Nicolaescu <dann@xtensa-linux.org> Signed-off-by: Pete Delaney <piet@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: dispatch medium-priority interruptsMarc Gauthier1-11/+44
Add support for dispatching medium-priority interrupts, that is, interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be preempted by higher priority IRQ. Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: clean up files to make them code-style compliantChris Zankel1-12/+12
Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: save and restore scompare1 SR on kernel entryMax Filippov1-0/+13
Although scompare1 may be saved/restored by xchal_ncp_{load,store} macros, explicit save/restore of registers manipulated by the kernel itself is considered more correct. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide proper assembler function boundaries with ENDPROC()Chris Zankel1-2/+28
Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-25xtensa: switch to generic kernel_execve()Max Filippov1-17/+1
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-25xtensa: switch to generic kernel_thread()Max Filippov1-28/+13
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-19xtensa: minor compiler warning fixChris Zankel1-1/+1
Fix two compiler warnings complaining about truncating a value on a 64-bit host, and about declaring an unused variable that is only used for a specific configuration. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15xtensa: reorganize SR referencingMax Filippov1-126/+126
- reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-05-21xtensa: add handling of TIF_NOTIFY_RESUMEAl Viro1-2/+3
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-05-21xtensa: switch to generic rt_sigsuspend(2)Al Viro1-1/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2010-05-02xtensa: Shuffle include statements to fix linker scriptChris Zankel1-0/+1
The linker script was including assembly macros from the coprocessor header file that is not otherwise used by the script. Signed-off-by: Chris Zankel <chris@zankel.net>
2010-02-09tree-wide: Assorted spelling fixesDaniel Mack1-2/+2
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-04-02xtensa: nommu supportJohannes Weiner1-1/+2
Add support for !CONFIG_MMU setups. Signed-off-by: Johannes Weiner <jw@emlix.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2008-11-06xtensa: move headers files to arch/xtensa/includeChris Zankel1-1/+1
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13[XTENSA] Fix register corruption for certain processor configurationsChris Zankel1-29/+15
For processor configurations that have optional registers (compiler-used but non-coprocessor), user space registers might get corrupted when there are only 4 registers in the current window-frame, ie. register a4 belongs to the oldest frame in the register file. Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13[XTENSA] Add support for configurable registers and coprocessorsChris Zankel1-222/+73
The Xtensa architecture allows to define custom instructions and registers. Registers that are bound to a coprocessor are only accessible if the corresponding enable bit is set, which allows to implement a 'lazy' context switch mechanism. Other registers needs to be saved and restore at the time of the context switch or during interrupt handling. This patch adds support for these additional states: - save and restore registers that are used by the compiler upon interrupt entry and exit. - context switch additional registers unbound to any coprocessor - 'lazy' context switch of registers bound to a coprocessor - ptrace interface to provide access to additional registers - update configuration files in include/asm-xtensa/variant-fsf Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13[XTENSA] Remove unused codeChris Zankel1-22/+0
We will never (need to) support signal handling coming from a double exception. There are too many things that could go wrong and delivering signals is not the fastest method for IPC, anyway. Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13[XTENSA] Fix comments regarding the number of frames to saveChris Zankel1-6/+6
Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13[XTENSA] Add missing a2 register restore in register spill routineChris Zankel1-3/+5
Register a2 is saved in depc but wasn't getting restored before returning from _spill_registers when there weren't any registers to spill. The mask to cut the top bit from the rotated WINDOWMASK register was also one bit short. Signed-off-by: CHris Zankel <chris@zankel.net>
2007-08-27[XTENSA] Add support for cache-aliasingChris Zankel1-4/+71
Add support for processors that have cache-aliasing issues, such as the Stretch S5000 processor. Cache-aliasing means that the size of the cache (for one way) is larger than the page size, thus, a page can end up in several places in cache depending on the virtual to physical translation. The method used here is to map a user page temporarily through the auto-refill way 0 and of of the DTLB. We probably will want to revisit this issue and use a better approach with kmap/kunmap. Signed-off-by: Chris Zankel <chris@zankel.net>
2007-08-27[XTENSA] Add support for executable/non-executable feature in the mmuChris Zankel1-14/+28
Newer processor versions starting with Xtensa6/LX2 support an 'executable' bit for memory pages. This bit replaces the 'valid' bit, so it must be always set to one for older processor versions. To mark a page invalid, we now set the cache-attributes to b11, which is backward compatible. Signed-off-by: Chris Zankel <chris@zankel.net>
2007-05-31[XTENSA] Remove non-rt signal handlingChris Zankel1-22/+14
The non-rt signal handling was never really used, so we don't break anything. This patch also cleans up the signal stack-frame to make it independent from the processor configuration. It also improves the method used for controlling single-stepping. We now save and restore the 'icountlevel' register that controls single stepping and set or clear the saved state to enable or disable it. Signed-off-by: Chris Zankel <chris@zankel.net>
2006-12-10[PATCH] xtensa: fix system call interfaceChris Zankel1-78/+150
This is a long outstanding patch to finally fix the syscall interface. The constants used for the system calls are those we have provided in our libc patches. This patch also fixes the shmbuf and stat structure, and fcntl definitions. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-10[PATCH] xtensa: remove extra header filesChris Zankel1-14/+14
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-23[PATCH] xtensa: remove verify_area macrosJesper Juhl1-1/+1
verify_area() is still alive on xtensa in 2.6.17-rc3-git13 It would be nice to finally be rid of that function across the board. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-09kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h supportSam Ravnborg1-1/+1
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2005-06-24[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3Chris Zankel1-0/+1996
The attached patches provides part 3 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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