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2017-12-16xtensa: enable stack protectorMax Filippov1-0/+6
The implementation is adopted from the ARM arch. GCC 7.3, 8 or newer is required for building the xtensa kernel with SSP. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-10xtensa: clean up fixups in assembly codeMax Filippov1-28/+5
Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-10xtensa: use call instead of callx in assembly codeMax Filippov1-37/+19
Now that xtensa assembly sources are compiled with -mlongcalls let the assembler and linker relax call instructions into l32r + callx where needed. This change makes the code cleaner and potentially a bit faster. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-10xtensa: build kernel with text-section-literalsMax Filippov1-0/+8
vmlinux.lds.S doesn't do anything special with literals, so instead of keeping them separate put them into the corresponding text sections. Drop explicit .literal sections from the vmlinux.lds.S, use standard section macros. Mark literal pool locations in the assembly sources. Unfortunately assembler doesn't put literals into .init sections and external libgcc may still have .literal sections, so sed transformation to the linker script is still needed. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-05-01xtensa: use generic tracehooksMax Filippov1-1/+2
Use tracehook_report_syscall_{entry,exit} instead of a local copy of it in do_syscall_trace. Allow tracehook to cancel syscall by returning invalid syscall number to the system_call function. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-10-11Merge branch 'work.uaccess2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull uaccess.h prepwork from Al Viro: "Preparations to tree-wide switch to use of linux/uaccess.h (which, obviously, will allow to start unifying stuff for real). The last step there, ie PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>' sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \ `git grep -l "$PATT"|grep -v ^include/linux/uaccess.h` is not taken here - I would prefer to do it once just before or just after -rc1. However, everything should be ready for it" * 'work.uaccess2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: remove a stray reference to asm/uaccess.h in docs sparc64: separate extable_64.h, switch elf_64.h to it score: separate extable.h, switch module.h to it mips: separate extable.h, switch module.h to it x86: separate extable.h, switch sections.h to it remove stray include of asm/uaccess.h from cacheflush.h mn10300: remove a bogus processor.h->uaccess.h include xtensa: split uaccess.h into C and asm sides bonding: quit messing with IOCTL kill __kernel_ds_p off mn10300: finish verify_area() off frv: move HAVE_ARCH_UNMAPPED_AREA to pgtable.h exceptions: detritus removal
2016-09-27xtensa: split uaccess.h into C and asm sidesAl Viro1-1/+1
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2016-07-24xtensa: cleanup MMU setup and kernel layout macrosMax Filippov1-2/+3
Make kernel load address explicit, independent of the selected MMU configuration and configurable from Kconfig. Do not restrict it to the first 512MB of the physical address space. Cleanup kernel memory layout macros: - rename VECBASE_RESET_VADDR to VECBASE_VADDR, XC_VADDR to VECTOR_VADDR; - drop VIRTUAL_MEMORY_ADDRESS and LOAD_MEMORY_ADDRESS; - introduce PHYS_OFFSET and use it in __va and __pa definitions; - synchronize MMU/noMMU vectors, drop unused NMI vector; - replace hardcoded vectors offset of 0x3000 with Kconfig symbol. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11xtensa: support hardware breakpoints/watchpointsMax Filippov1-1/+71
Use perf framework to manage hardware instruction and data breakpoints. Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to query and set instruction and data breakpoints. Address bit 0 choose instruction (0) or data (1) break register, bits 31..1 are the register number. Both calls transfer two 32-bit words: address (0) and control (1). Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set. Data breakpoint control word bit 31 is 'trigger on store', bit 30 is 'trigger on load, bits 29..0 are length. Length 0 is used to clear a breakpoint. To set a breakpoint length must be a power of 2 in the range 1..64 and the address must be length-aligned. Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug exception is raised by the kernel code accessing watched userspace address and disable corresponding data breakpoint. On exit to userspace check that flag and, if set, restore all data breakpoints. Handle debug exceptions raised with PS.EXCM set. This may happen when window overflow/underflow handler or fast exception handler hits data breakpoint, in which case save and disable all data breakpoints, single-step faulting instruction and restore data breakpoints. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11xtensa: use context structure for debug exceptionsMax Filippov1-12/+8
With implementation of data breakpoints debug exceptions raised when PS.EXCM is set need to be handled, e.g. window overflow code can write to watched userspace address. Currently debug exception handler uses EXCSAVE and DEPC SRs to save temporary registers, but DEPC may not be available when PS.EXCM is set and more space will be needed to save additional state. Reorganize debug context: create per-CPU structure debug_table instance and store its address in the EXCSAVE<debug level> instead of debug_exception function address. Expand this structure when more save space is needed. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-02xtensa: fixes for configs without loop optionMax Filippov1-2/+6
Build-time fixes: - make lbeg/lend/lcount save/restore conditional on kernel entry; - don't clear lcount in platform_restart functions unconditionally. Run-time fixes: - use correct end of range register in __endla paired with __loopt, not the unused temporary register. This fixes .bss zero-initialization. Update comments in asmmacro.h; - don't clobber a10 in the usercopy that leads to access to unmapped memory. Cc: <stable@vger.kernel.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17xtensa: implement fake NMIMax Filippov1-14/+79
In case perf IRQ is the highest of the medium-level IRQs, and is alone on its level, it may be treated as NMI: - LOCKLEVEL is defined to be one level less than EXCM level, - IRQ masking never lowers current IRQ level, - new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that IRQ; new second level exception handler, do_nmi, assigned to it handles it as NMI, - atomic operations in configurations without s32c1i still need to mask all interrupts. Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17xtensa: don't touch EXC_TABLE_FIXUP in _switch_toMax Filippov1-4/+0
There's no way _switch_to can produce double exceptions now, don't enter/leave EXC_TABLE_FIXUP critical section. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17xtensa: fix kernel register spillingMax Filippov1-2/+2
call12 can't be safely used as the first call in the inline function, because the compiler does not extend the stack frame of the bounding function accordingly, which may result in corruption of local variables. If a call needs to be done, do call8 first followed by call12. For pure assembly code in _switch_to increase stack frame size of the bounding function. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17xtensa: reorganize irq flags tracingMax Filippov1-25/+14
entry.s only disables IRQs on hardware IRQ, move trace_hardirqs_off call into do_interrupt. Check actual intlevel that will be restored on return from exception handler to decide if trace_hardirqs_on should be called. Annotate IRQ on/off points in the TIF_* handling loop on return from exception handler. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-08-17xtensa: keep exception/interrupt stack continuousMax Filippov1-15/+28
Restore original a0 in the kernel exception stack frame. This way it looks like the frame that got interrupt/exception did alloca (copy a0 and a1 spilled under old stack to the new location as well) to save registers and then did a call to handler. The point where interrupt/exception was taken is not in the stack chain, only in pt_regs (call4 from that address can be simulated to keep it in the stack trace). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-07-15xtensa: fix threadptr reload on return to userspaceMax Filippov1-1/+2
Userspace return code may skip restoring THREADPTR register if there are no registers that need to be zeroed. This leads to spurious failures in libc NPTL tests. Always restore THREADPTR on return to userspace. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: deprecate fast_xtensa and fast_spill_registers syscallsMax Filippov1-0/+28
These syscalls are not used by userspace tools for some time now, and they have issues when called with invalid arguments. It's not worth changing signal delivery mechanism as we don't expect any new users for these syscalls. Let's keep them for backwards compatibility under #ifdef, disabled by default. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: fix a6 and a7 handling in fast_syscall_xtensaMax Filippov1-7/+5
Remove restoring a6 on some return paths and instead modify and restore it in a single place, using symbolic name. Correctly restore a7 from PT_AREG7 in case of illegal a6 value. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_missMax Filippov1-1/+1
Current definition of TLBTEMP_BASE_2 is always 32K above the TLBTEMP_BASE_1, whereas fast_second_level_miss handler for the TLBTEMP region analyzes virtual address bit (PAGE_SHIFT + DCACHE_ALIAS_ORDER) to determine TLBTEMP region where the fault happened. The size of the TLBTEMP region is also checked incorrectly: not 64K, but twice data cache way size (whicht may as well be less than the instruction cache way size). Fix TLBTEMP_BASE_2 to be TLBTEMP_BASE_1 + data cache way size. Provide TLBTEMP_SIZE that is a greater of doubled data cache way size or the instruction cache way size, and use it to determine if the second level TLB miss occured in the TLBTEMP region. Practical occurence of page faults in the TLBTEMP area is extremely rare, this code can be tested by deletion of all w[di]tlb instructions in the tlbtemp_mapping region. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DSMax Filippov1-4/+8
With SMP and a lot of debug options enabled task_struct::thread gets out of reach of s32i/l32i instructions with base pointing at task_struct, breaking build with the following messages: arch/xtensa/kernel/entry.S: Assembler messages: arch/xtensa/kernel/entry.S:1002: Error: operand 3 of 'l32i.n' has invalid value '1048' arch/xtensa/kernel/entry.S:1831: Error: operand 3 of 's32i.n' has invalid value '1040' arch/xtensa/kernel/entry.S:1832: Error: operand 3 of 's32i.n' has invalid value '1044' Change base to point to task_struct::thread in such cases. Don't use a10 in _switch_to to save/restore prev pointer as a2 is not clobbered. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-28xtensa: fix fast_syscall_spill_registersChris Zankel1-209/+174
The original implementation could clobber registers under certain conditions. The Xtensa processor architecture uses windowed registers and the original implementation was using a4 as a temporary register, which under certain conditions could be register a0 of the oldest window frame, and didn't always restore the content correctly. By moving the _spill_registers routine inside the fast system call, it frees up one more register (the return address is not required anymore) for the spill routine. Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-25xtensa: save current register frame in fast_syscall_spill_registers_fixupMax Filippov1-0/+12
We need it saved because it contains a3 where we track which register windows we still need to spill, and fixup handler may call C exception handlers. Also fix comments. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-25xtensa: introduce spill_registers_kernel macroMax Filippov1-12/+48
Most in-kernel users want registers spilled on the kernel stack and don't require PS.EXCM to be set. That means that they don't need fixup routine and could reuse regular window overflow mechanism for that, which makes spill routine very simple. Cc: stable@vger.kernel.org Suggested-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-10-15xtensa: fix fast_syscall_spill_registers_fixupMax Filippov1-19/+30
fast_syscall_spill_registers_fixup was not correctly updated by the 'keep a3 and excsave1 on entry to exception handlers' patch: it doesn't preserve a3 that it gets on entry, breaking _spill_registers in case of page fault on stack during register spilling, leading to unhandled exception in kernel mode. Preserve a3 by saving it in the original _spill_registers stack frame's a3 during exception handling and restoring it afterwards. Also fix comments and function bounds annotations. Reported-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: new fast_alloca handlerMax Filippov1-152/+40
Instead of emulating movsp instruction in the kernel use window underflow handler to load missing register window and retry failed movsp. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: keep a3 and excsave1 on entry to exception handlersMax Filippov1-68/+47
Based on the SMP patch by Joe Taylor and subsequent fixes. Preserve exception table pointer (normally stored in excsave1 SR) as it cannot be easily restored in SMP environment. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: enable kernel preemptionMax Filippov1-28/+17
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06xtensa: check thread flags atomically on return from user exceptionMax Filippov1-18/+21
Check pending signals and rescheduling thread flags with interrupts disabled, and don't enable them if no flags are set. Call trace_hardirqs_on after thread flags handling, so that rescheduling is done and hardirqs tracking flag is updated in the correct task context. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08xtensa: check TLB sanity on return to userspaceMax Filippov1-1/+8
- check that user TLB mappings correspond to the current page table; - check that TLB mapping VPN is in the kernel/user address range in accordance with its ASID. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-20xtensa: fix fast_store_prohibited _PAGE_WRITABLE_BIT testMax Filippov1-1/+6
Before _PAGE_WRITABLE_BIT test fast_store_prohibited must make sure that PTE is present. Otherwise 'writable' bit is undefined and may be reused in the 'file offset' or 'swap type' PTE fields. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09xtensa: disable IRQs while IRQ handler is runningMax Filippov1-41/+11
IRQ handlers are expected to run with IRQs disabled. See e.g. http://lwn.net/Articles/380931/ for a longer story. This was overlooked in the commit 2d1c645 xtensa: dispatch medium-priority interrupts Revert to old behavior and simplify interrupt entry and exit code. Interrupt handler still honours IRQ priority. do_notify_resume/schedule must be called with interrupts enabled, enable interrupts if we return from user exception. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09xtensa: add irq flags trace supportMax Filippov1-0/+32
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: add support for TLSChris Zankel1-1/+11
The Xtensa architecture provides a global register called THREADPTR for the purpose of Thread Local Storage (TLS) support. This allows us to use a fairly simple implementation, keeping the thread pointer in the regset and simply saving and restoring it upon entering/exiting the from user space. Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: add support for oprofiledann1-1/+1
Support call graph profiling. Keep upper two bits of PC unchanged through backtrace rather than take them from sp (a1). The stack pointer is usually in the same GB (same upper 2 bits) as PC, but technically doesn't always have to be (and might not in the future, when taking full advantage of MMU v3). Signed-off-by: Dan Nicolaescu <dann@xtensa-linux.org> Signed-off-by: Pete Delaney <piet@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23xtensa: dispatch medium-priority interruptsMarc Gauthier1-11/+44
Add support for dispatching medium-priority interrupts, that is, interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be preempted by higher priority IRQ. Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: clean up files to make them code-style compliantChris Zankel1-12/+12
Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: save and restore scompare1 SR on kernel entryMax Filippov1-0/+13
Although scompare1 may be saved/restored by xchal_ncp_{load,store} macros, explicit save/restore of registers manipulated by the kernel itself is considered more correct. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide proper assembler function boundaries with ENDPROC()Chris Zankel1-2/+28
Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-25xtensa: switch to generic kernel_execve()Max Filippov1-17/+1
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-25xtensa: switch to generic kernel_thread()Max Filippov1-28/+13
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-19xtensa: minor compiler warning fixChris Zankel1-1/+1
Fix two compiler warnings complaining about truncating a value on a 64-bit host, and about declaring an unused variable that is only used for a specific configuration. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15xtensa: reorganize SR referencingMax Filippov1-126/+126
- reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-05-21xtensa: add handling of TIF_NOTIFY_RESUMEAl Viro1-2/+3
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-05-21xtensa: switch to generic rt_sigsuspend(2)Al Viro1-1/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2010-05-02xtensa: Shuffle include statements to fix linker scriptChris Zankel1-0/+1
The linker script was including assembly macros from the coprocessor header file that is not otherwise used by the script. Signed-off-by: Chris Zankel <chris@zankel.net>
2010-02-09tree-wide: Assorted spelling fixesDaniel Mack1-2/+2
In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-04-02xtensa: nommu supportJohannes Weiner1-1/+2
Add support for !CONFIG_MMU setups. Signed-off-by: Johannes Weiner <jw@emlix.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2008-11-06xtensa: move headers files to arch/xtensa/includeChris Zankel1-1/+1
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
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