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path: root/arch/x86/include/asm/msr-index.h
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2018-12-21KVM: x86: Add Intel PT virtualization work modeChao Peng1-0/+1
2018-12-21perf/x86/intel/pt: Add new bit definitions for PT MSRsLuwei Kang1-0/+3
2018-12-21perf/x86/intel/pt: Move Intel PT MSRs bit defines to global headerChao Peng1-0/+33
2018-12-18kvm: x86: Add AMD's EX_CFG to the list of ignored MSRsEduardo Habkost1-0/+1
2018-11-28x86/speculation: Prepare for per task indirect branch speculation controlTim Chen1-2/+3
2018-10-02perf/x86/intel: Add a separate Arch Perfmon v4 PMI handlerAndi Kleen1-0/+1
2018-08-05x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentryPaolo Bonzini1-0/+1
2018-07-04x86/KVM/VMX: Add L1D MSR based flushPaolo Bonzini1-0/+6
2018-06-01x86: msr-index.h: Correct SNB_C1/C3_AUTO_UNDEMOTE definesMatt Turner1-2/+2
2018-05-18x86/bugs: Rename SSBD_NO to SSB_NOKonrad Rzeszutek Wilk1-1/+1
2018-05-17x86/speculation: Add virtualized speculative store bypass disable supportTom Lendacky1-0/+2
2018-05-09x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk1-5/+5
2018-05-03x86/process: Allow runtime control of Speculative Store BypassThomas Gleixner1-1/+2
2018-05-03x86/bugs/intel: Set proper CPU features and setup RDSKonrad Rzeszutek Wilk1-0/+6
2018-03-16x86/msr: Add AMD Core Perf Extension MSRsJanakarajan Natarajan1-0/+14
2018-02-01Merge branch 'x86/hyperv' of git://git.kernel.org/pub/scm/linux/kernel/git/ti...Radim Krčmář1-0/+15
2018-01-29Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-0/+12
2018-01-26x86/msr: Add definitions for new speculation control MSRsDavid Woodhouse1-0/+12
2018-01-14Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-0/+3
2018-01-09x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSCTom Lendacky1-0/+1
2018-01-09x86/cpu/AMD: Make LFENCE a serializing instructionTom Lendacky1-0/+2
2017-12-04x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU featureTom Lendacky1-0/+2
2017-11-07x86/boot: Add early boot support when running with SEV activeTom Lendacky1-0/+3
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-07-18x86/cpu/AMD: Add the Secure Memory Encryption CPU featureTom Lendacky1-0/+2
2017-07-06Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-0/+2
2017-07-04Merge tag 'pm-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafa...Linus Torvalds1-6/+12
2017-06-07kvm: vmx: Check value written to IA32_BNDCFGSJim Mattson1-0/+2
2017-05-23perf/x86: Add sysfs entry to freeze counters on SMIKan Liang1-0/+2
2017-05-16Merge branch 'utilities' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki1-6/+12
2017-04-29x86: msr-index.h: fix shifts to ULL results in HWP macros.Len Brown1-3/+3
2017-04-29x86: msr-index.h: define HWP.EPP valuesLen Brown1-0/+4
2017-03-20x86/arch_prctl: Add ARCH_[GET|SET]_CPUIDKyle Huey1-0/+2
2017-03-20x86/cpufeature: Detect CPUID faulting supportKyle Huey1-0/+2
2017-03-20x86/msr: Rename MISC_FEATURE_ENABLES to MISC_FEATURES_ENABLESKyle Huey1-3/+3
2017-03-11x86/process: Correct and optimize TIF_BLOCKSTEP switchKyle Huey1-0/+1
2017-03-01Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki1-1/+10
2017-03-01x86 msr_index.h: Define MSR_MISC_FEATURE_CONTROLLen Brown1-0/+1
2017-03-01x86 msr-index.h: Define Atom specific core ratio MSR locationsLen Brown1-0/+6
2017-03-01tools/power turbostat: Baytrail c-state supportLen Brown1-0/+2
2017-03-01x86: msr-index.h: Remove unused MSR_NHM_SNB_PKG_CST_CFG_CTLLen Brown1-1/+0
2017-03-01x86: msr-index.h: Define MSR_PKG_CST_CONFIG_CONTROLLen Brown1-0/+1
2017-02-25x86: msr-index.h: define EPB mid-pointsLen Brown1-3/+5
2017-02-04x86/msr: Add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bitGrzegorz Andrejczuk1-0/+5
2016-11-23x86/mce: Include the PPIN in MCE records when availableTony Luck1-0/+4
2016-10-14x86: Remove duplicate rtit status MSR macroLongpeng(Mike)1-1/+0
2016-07-07x86: remove duplicate turbo ratio limit MSRsSrinivas Pandruvada1-2/+0
2016-05-05perf/x86/intel/pt: Add IP filtering register/CPUID bitsAlexander Shishkin1-0/+9
2016-05-05perf/x86/intel/pt: Move PT specific MSR bit definitions to a private headerAlexander Shishkin1-20/+0
2016-04-23perf/x86/intel/rapl: Support Skylake RAPL domainsSrinivas Pandruvada1-0/+2
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