summaryrefslogtreecommitdiffstats
path: root/arch/riscv
AgeCommit message (Expand)AuthorFilesLines
2018-11-30Merge tag 'trace-v4.20-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds1-12/+2
2018-11-27riscv/function_graph: Simplify with function_graph_enter()Steven Rostedt (VMware)1-12/+2
2018-11-20RISC-V: recognize S/U mode bits in print_isaPatrick Stählin1-3/+6
2018-11-20riscv: add asm/unistd.h UAPI headerDavid Abdurachmanov2-10/+21
2018-11-20riscv: fix warning in arch/riscv/include/asm/module.hDavid Abdurachmanov1-0/+1
2018-11-20RISC-V: Build flat and compressed kernel imagesAnup Patel6-2/+120
2018-11-20RISC-V: Fix raw_copy_{to,from}_user()Olof Johansson1-2/+2
2018-11-12RISC-V: Silence some module warnings on 32-bitOlof Johansson1-6/+6
2018-11-12RISC-V: lib: Fix build error for 64-bitOlof Johansson1-1/+1
2018-11-12riscv: add missing vdso_install targetDavid Abdurachmanov1-0/+4
2018-11-12riscv: fix spacing in struct pt_regsDavid Abdurachmanov1-2/+2
2018-11-12RISC-V: defconfig: Enable printk timestampsAnup Patel1-0/+1
2018-11-01RISC-V: refresh defconfigAnup Patel1-8/+8
2018-10-31Merge tag 'riscv-for-linus-4.20-mw2' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds3-7/+5
2018-10-31lib: Remove umoddi3 and udivmoddi4Palmer Dabbelt1-1/+0
2018-10-31Move EM_RISCV into elf-em.hPalmer Dabbelt1-3/+0
2018-10-31RISC-V: properly determine hardware capsAndreas Schwab1-3/+5
2018-10-31Revert "RISC-V: Select GENERIC_LIB_UMODDI3 on RV32"Palmer Dabbelt1-1/+0
2018-10-31mm: remove include/linux/bootmem.hMike Rapoport1-2/+1
2018-10-31memblock: rename free_all_bootmem to memblock_free_allMike Rapoport1-1/+1
2018-10-31mm: remove CONFIG_HAVE_MEMBLOCKMike Rapoport1-1/+0
2018-10-31mm: remove CONFIG_NO_BOOTMEMMike Rapoport1-1/+0
2018-10-31treewide: remove current_text_addrNick Desaulniers1-6/+0
2018-10-25Merge tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds27-238/+679
2018-10-25Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+1
2018-10-24Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2-24/+1
2018-10-22RISC-V: SMP cleanup and new featuresPalmer Dabbelt10-62/+245
2018-10-22RISC-V: Fix some RV32 bugs and build failuresPalmer Dabbelt4-2/+7
2018-10-22riscv: Add support to no-FPU systemsPalmer Dabbelt9-127/+196
2018-10-22RISC-V: Cosmetic menuconfig changesNick Kossifidis2-36/+39
2018-10-22riscv: move GCC version check for ARCH_SUPPORTS_INT128 to KconfigMasahiro Yamada2-2/+1
2018-10-22RISC-V: remove the unused return_to_handler exportChristoph Hellwig1-1/+0
2018-10-22RISC-V: Add futex support.Jim Wilson3-1/+129
2018-10-22RISC-V: Add FP register ptrace support for gdb.Jim Wilson2-0/+55
2018-10-22RISC-V: Mask out the F extension on systems without DPalmer Dabbelt1-0/+7
2018-10-22RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt1-7/+0
2018-10-22RISC-V: Show IPI statsAnup Patel3-7/+49
2018-10-22RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfoAnup Patel1-4/+6
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra6-25/+58
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra3-1/+46
2018-10-22RISC-V: Use WRITE_ONCE instead of direct accessAtish Patra1-2/+3
2018-10-22RISC-V: Use mmgrab()Palmer Dabbelt1-1/+2
2018-10-22RISC-V: Rename im_okay_therefore_i_am to found_boot_cpuPalmer Dabbelt1-4/+5
2018-10-22RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt3-4/+7
2018-10-22RISC-V: Provide a cleaner raw_smp_processor_id()Palmer Dabbelt1-10/+4
2018-10-22RISC-V: Disable preemption before enabling interruptsAtish Patra1-1/+5
2018-10-22RISC-V: Comment on the TLB flush in smp_callin()Palmer Dabbelt1-0/+4
2018-10-22RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt1-7/+61
2018-10-22RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt1-7/+0
2018-10-22RISC-V: No need to pass scause as arg to do_IRQ()Anup Patel2-3/+2