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linux
WIP-syscall
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mmu_gather-race-fix
n900-dt
n900-dt-with-ssi
n900-dts-twl5030
n900-modem-rework
n900-omapdrm
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proc-cmdline
sc18is600
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ssi-cleaned
ssi-cleaned-dt
ssi-cleaned-dt2
ssi-cleaned-dt3
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twl4030-madc-cleanup
Linux Kernel (branches are rebased on master from time to time)
Linus Torvalds
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riscv
Age
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Author
Files
Lines
2019-06-26
riscv: mm: Fix code comment
ShihPo Hung
1
-3
/
+0
2019-06-26
riscv: dts: Re-organize the DT nodes
Yash Shah
2
-0
/
+19
2019-06-26
RISC-V: defconfig: enable MMC & SPI for RISC-V
Atish Patra
1
-0
/
+5
2019-06-21
Merge tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gre...
Linus Torvalds
12
-136
/
+12
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
Thomas Gleixner
11
-132
/
+11
2019-06-17
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Linus Torvalds
1
-0
/
+24
2019-06-17
Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
9
-6
/
+303
2019-06-17
riscv: remove unused barrier defines
Rolf Eike Beer
1
-5
/
+0
2019-06-17
riscv: mm: synchronize MMU after pte change
ShihPo Hung
1
-0
/
+13
2019-06-17
riscv: dts: add initial board data for the SiFive HiFive Unleashed
Paul Walmsley
2
-0
/
+67
2019-06-17
riscv: dts: add initial support for the SiFive FU540-C000 SoC
Paul Walmsley
1
-0
/
+215
2019-06-17
arch: riscv: add support for building DTB files from DT source data
Paul Walmsley
1
-0
/
+2
2019-06-11
riscv: Fix udelay in RV32.
Nick Hu
1
-1
/
+1
2019-06-11
riscv: export pm_power_off again
Andreas Schwab
1
-0
/
+1
2019-06-11
RISC-V: defconfig: enable clocks, serial console
Kevin Hilman
1
-0
/
+4
2019-06-07
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf
David S. Miller
1
-0
/
+24
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
68
-611
/
+68
2019-05-31
bpf, riscv: clear high 32 bits for ALU32 add/sub/neg/lsh/rsh/arsh
Luke Nelson
1
-0
/
+18
2019-05-30
treewide: Add SPDX license identifier - Kbuild
Greg Kroah-Hartman
2
-0
/
+2
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
3
-27
/
+3
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
1
-9
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
1
-5
/
+1
2019-05-24
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120
Thomas Gleixner
5
-70
/
+5
2019-05-24
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36
Thomas Gleixner
1
-5
/
+1
2019-05-23
bpf, riscv: clear target register high 32-bits for and/or/xor on ALU32
Björn Töpel
1
-0
/
+6
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
6
-0
/
+6
2019-05-19
Merge tag 'kbuild-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ma...
Linus Torvalds
1
-4
/
+0
2019-05-19
Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
34
-320
/
+584
2019-05-18
arch: remove dangling asm-generic wrappers
Masahiro Yamada
1
-4
/
+0
2019-05-16
riscv: fix locking violation in page fault handler
Andreas Schwab
1
-1
/
+2
2019-05-16
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
Yash Shah
3
-0
/
+192
2019-05-16
RISC-V: Avoid using invalid intermediate translations
Palmer Dabbelt
1
-2
/
+10
2019-05-16
riscv: Support BUG() in kernel module
Vincent Chen
1
-1
/
+1
2019-05-16
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
Vincent Chen
2
-4
/
+23
2019-05-16
riscv: support trap-based WARN()
Vincent Chen
1
-10
/
+18
2019-05-16
riscv: fix sbi_remote_sfence_vma{,_asid}.
Gary Guo
1
-7
/
+12
2019-05-16
riscv: move switch_mm to its own file
Gary Guo
3
-52
/
+72
2019-05-16
riscv: move flush_icache_{all,mm} to cacheflush.c
Gary Guo
3
-50
/
+62
2019-05-16
RISC-V: Access CSRs using CSR numbers
Anup Patel
9
-48
/
+57
2019-05-16
RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
Anup Patel
2
-16
/
+21
2019-05-16
RISC-V: Use tabs to align macro values in asm/csr.h
Anup Patel
1
-38
/
+38
2019-05-16
RISC-V: Fix minor checkpatch issues.
Atish Patra
1
-2
/
+2
2019-05-16
RISC-V: Support nr_cpus command line option.
Atish Patra
1
-1
/
+9
2019-05-14
riscv: switch over to generic free_initmem()
Mike Rapoport
1
-5
/
+0
2019-05-07
Merge tag 'audit-pr-20190507' of git://git.kernel.org/pub/scm/linux/kernel/gi...
Linus Torvalds
1
-1
/
+1
2019-05-06
Merge tag 'arm64-mmiowb' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
Linus Torvalds
3
-13
/
+17
2019-05-06
Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...
Linus Torvalds
1
-3
/
+0
2019-05-06
Merge branch 'core-stacktrace-for-linus' of git://git.kernel.org/pub/scm/linu...
Linus Torvalds
1
-2
/
+0
2019-05-06
Merge branch 'core-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds
1
-0
/
+1
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