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2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva1-2/+2
2020-07-21bpf, riscv: Use compressed instructions in the rv64 JITLuke Nelson1-134/+147
2020-07-21bpf, riscv: Add encodings for compressed instructionsLuke Nelson1-0/+452
2020-07-21bpf, riscv: Modify JIT ctx to support compressed instructionsLuke Nelson4-19/+44
2020-05-06bpf, riscv: Optimize BPF_JSET BPF_K using andi on RV64Luke Nelson1-8/+19
2020-05-06bpf, riscv: Optimize BPF_JMP BPF_K when imm == 0 on RV64Luke Nelson1-5/+10
2020-05-06bpf, riscv: Optimize FROM_LE using verifier_zext on RV64Luke Nelson1-6/+14
2020-05-06bpf, riscv: Enable missing verifier_zext optimizations on RV64Luke Nelson1-4/+4
2020-04-30bpf, riscv: Fix stack layout of JITed code on RV32Luke Nelson1-33/+65
2020-04-26bpf, riscv: Fix tail call count off by one in RV32 BPF JITLuke Nelson1-2/+3
2020-04-08riscv, bpf: Fix offset range checking for auipc+jalr on RV64Luke Nelson1-17/+32
2020-03-05riscv, bpf: Add RV32G eBPF JITLuke Nelson3-1/+1365
2020-03-05riscv, bpf: Factor common RISC-V JIT codeLuke Nelson4-601/+639
2019-12-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller1-238/+293
2019-12-19riscv, bpf: Optimize callsBjörn Töpel1-37/+64
2019-12-19riscv, bpf: Provide RISC-V specific JIT image alloc/freeBjörn Töpel1-0/+13
2019-12-19riscv, bpf: Optimize BPF tail callsBjörn Töpel1-6/+7
2019-12-19riscv, bpf: Add support for far jumps and exitsBjörn Töpel1-20/+17
2019-12-19riscv, bpf: Add support for far branching when emitting tail callBjörn Töpel1-19/+3
2019-12-19riscv, bpf: Add support for far branchingBjörn Töpel1-164/+188
2019-12-19riscv, bpf: Fix broken BPF tail callsBjörn Töpel1-2/+11
2019-12-11bpf, riscv: Limit to 33 tail callsPaul Chaignon1-2/+2
2019-07-05bpf, riscv: Enable zext optimization for more RV64G ALU opsLuke Nelson1-8/+8
2019-06-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+24
2019-06-07Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfDavid S. Miller1-0/+24
2019-05-31bpf, riscv: clear high 32 bits for ALU32 add/sub/neg/lsh/rsh/arshLuke Nelson1-0/+18
2019-05-24riscv: bpf: eliminate zero extension code-genJiong Wang1-13/+30
2019-05-23bpf, riscv: clear target register high 32-bits for and/or/xor on ALU32Björn Töpel1-0/+6
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-02-05bpf, riscv: add BPF JIT for RV64GBjörn Töpel2-0/+1603