index
:
linux
WIP-syscall
master
mmu_gather-race-fix
n900-dt
n900-dt-with-ssi
n900-dts-twl5030
n900-modem-rework
n900-omapdrm
next
proc-cmdline
sc18is600
ssi
ssi-cleaned
ssi-cleaned-dt
ssi-cleaned-dt2
ssi-cleaned-dt3
tty-splice
twl4030-madc-cleanup
Linux Kernel (branches are rebased on master from time to time)
Linus Torvalds
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
kernel
/
setup.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-10-25
treewide: Convert macro and uses of __section(foo) to __section("foo")
Joe Perches
1
-2
/
+2
2020-10-02
RISC-V: Add EFI runtime services
Atish Patra
1
-2
/
+5
2020-10-02
RISC-V: Add early ioremap support
Atish Patra
1
-0
/
+2
2020-10-02
RISC-V: Move DT mapping outof fixmap
Anup Patel
1
-2
/
+7
2020-08-20
RISC-V: Remove CLINT related code from timer and arch
Anup Patel
1
-2
/
+0
2020-06-09
mm: don't include asm/pgtable.h if linux/mm.h is already included
Mike Rapoport
1
-1
/
+0
2020-05-18
riscv: Allow device trees to be built into the kernel
Palmer Dabbelt
1
-0
/
+4
2020-03-31
RISC-V: Support cpu hotplug
Atish Patra
1
-1
/
+18
2020-03-31
RISC-V: Add basic support for SBI v0.2
Atish Patra
1
-0
/
+5
2020-03-03
riscv: force hart_lottery to put in .sdata section
Zong Li
1
-2
/
+6
2020-01-31
Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
1
-0
/
+5
2020-01-22
riscv: Add KASAN support
Nick Hu
1
-0
/
+5
2020-01-14
arch/riscv/setup: Drop dummy_con initialization
Arvind Sankar
1
-4
/
+0
2019-11-17
riscv: provide native clint access for M-mode
Christoph Hellwig
1
-0
/
+2
2019-10-28
riscv: add prototypes for assembly language functions from head.S
Paul Walmsley
1
-0
/
+2
2019-07-09
RISC-V: Setup initial page tables in two stages
Anup Patel
1
-4
/
+2
2019-05-24
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120
Thomas Gleixner
1
-14
/
+1
2019-04-25
riscv: cleanup the parse_dtb calling conventions
Christoph Hellwig
1
-2
/
+4
2019-03-26
RISC-V: Always compile mm/init.c with cmodel=medany and notrace
Anup Patel
1
-8
/
+0
2019-03-04
RISC-V: Fixmap support and MM cleanups
Palmer Dabbelt
1
-126
/
+4
2019-03-04
arch: riscv: fix logic error in parse_dtb
Andreas Schwab
1
-1
/
+1
2019-03-04
RISC-V: Move cpuid to hartid mapping to SMP.
Atish Patra
1
-9
/
+0
2019-02-21
RISC-V: Move setup_vm() to mm/init.c
Anup Patel
1
-49
/
+0
2019-02-21
RISC-V: Move setup_bootmem() to mm/init.c
Anup Patel
1
-72
/
+0
2019-02-21
RISC-V: Setup init_mm before parse_early_param()
Anup Patel
1
-5
/
+4
2019-02-11
riscv: use pr_info and friends
Johan Hovold
1
-3
/
+3
2019-01-23
riscv: fixup max_low_pfn with PFN_DOWN.
Guo Ren
1
-1
/
+1
2019-01-07
arch: riscv: support kernel command line forcing when no DTB passed
Paul Walmsley
1
-1
/
+8
2018-12-17
RISC-V: Remove EARLY_PRINTK support
Anup Patel
1
-28
/
+0
2018-10-22
RISC-V: SMP cleanup and new features
Palmer Dabbelt
1
-0
/
+10
2018-10-22
RISC-V: Use Linux logical CPU number instead of hartid
Atish Patra
1
-0
/
+6
2018-10-22
RISC-V: Add logical CPU indexing for RISC-V
Atish Patra
1
-0
/
+4
2018-10-22
RISC-V: Use swiotlb on RV64 only
Zong Li
1
-0
/
+3
2018-10-02
RISCV: Fix end PFN for low memory
Atish Patra
1
-1
/
+1
2018-09-04
riscv: Do not overwrite initrd_start and initrd_end
Guenter Roeck
1
-7
/
+0
2018-08-13
RISC-V: Add early printk support via the SBI console
Palmer Dabbelt
1
-0
/
+27
2018-07-04
riscv: remove unnecessary of_platform_populate call
Rob Herring
1
-5
/
+0
2018-05-19
riscv: add swiotlb support
Christoph Hellwig
1
-0
/
+2
2018-02-20
Rename sbi_save to parse_dtb to improve code readability
Michael Clark
1
-1
/
+1
2018-01-30
riscv: add ZONE_DMA32
Christoph Hellwig
1
-0
/
+9
2018-01-30
RISC-V: Remove mem_end command line processing
Palmer Dabbelt
1
-19
/
+0
2018-01-30
RISC-V: Remove duplicate command-line parsing logic
Michael Clark
1
-16
/
+0
2017-12-11
RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code
Palmer Dabbelt
1
-11
/
+0
2017-11-30
RISC-V: Export some expected symbols for modules
Olof Johansson
1
-0
/
+2
2017-11-30
RISC-V: move empty_zero_page definition to C and export it
Olof Johansson
1
-0
/
+3
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt
1
-0
/
+257