Age | Commit message (Expand) | Author | Files | Lines |
2018-02-26 | riscv/barrier: Define __smp_{mb,rmb,wmb} | Andrea Parri | 1 | -3/+3 |
2018-02-07 | Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm... | Linus Torvalds | 6 | -28/+35 |
2018-02-01 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 1 | -1/+0 |
2018-01-31 | Merge tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mapping | Linus Torvalds | 2 | -38/+1 |
2018-01-30 | riscv: inline set_pgdir into its only caller | Christoph Hellwig | 1 | -11/+6 |
2018-01-30 | riscv: rename sptbr to satp | Christoph Hellwig | 2 | -8/+13 |
2018-01-30 | riscv: remove the unused current_pgdir function | Christoph Hellwig | 1 | -5/+0 |
2018-01-30 | RISC-V: Limit the scope of TLB shootdowns | Andrew Waterman | 1 | -8/+12 |
2018-01-30 | riscv: remove unused __ARCH_HAVE_MMU define | Tobias Klauser | 1 | -1/+0 |
2018-01-30 | riscv/ftrace: Add basic support | Alan Kao | 2 | -1/+10 |
2018-01-29 | Merge tag 'init_task-20180117' of git://git.kernel.org/pub/scm/linux/kernel/g... | Linus Torvalds | 1 | -2/+0 |
2018-01-15 | dma-mapping: provide a generic asm/dma-mapping.h | Christoph Hellwig | 2 | -30/+1 |
2018-01-09 | Construct init thread stack in the linker script rather than by union | David Howells | 1 | -2/+0 |
2018-01-09 | riscv: remove the unused dma_capable helper | Christoph Hellwig | 1 | -8/+0 |
2018-01-07 | riscv: rename SR_* constants to match the spec | Christoph Hellwig | 3 | -10/+10 |
2018-01-07 | riscv: remove CONFIG_MMU ifdefs | Christoph Hellwig | 4 | -24/+0 |
2018-01-07 | RISC-V: Make __NR_riscv_flush_icache visible to userspace | Palmer Dabbelt | 3 | -28/+27 |
2018-01-03 | arch: Remove clkdev.h asm-generic from Kbuild | Stephen Boyd | 1 | -1/+0 |
2017-12-11 | RISC-V: Resurrect smp_mb__after_spinlock() | Palmer Dabbelt | 1 | -0/+19 |
2017-12-05 | bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program type | Hendrik Brueckner | 1 | -0/+1 |
2017-12-01 | RISC-V: Fixes for clean allmodconfig build | Palmer Dabbelt | 6 | -17/+22 |
2017-12-01 | RISC-V: __io_writes should respect the length argument | Palmer Dabbelt | 1 | -1/+1 |
2017-12-01 | RISC-V: User-Visible Changes | Palmer Dabbelt | 7 | -30/+140 |
2017-12-01 | RISC-V: __io_writes should respect the length argument | Palmer Dabbelt | 1 | -1/+1 |
2017-11-30 | RISC-V: Allow userspace to flush the instruction cache | Andrew Waterman | 3 | -0/+38 |
2017-11-30 | RISC-V: Flush I$ when making a dirty page executable | Andrew Waterman | 5 | -30/+102 |
2017-11-30 | RISC-V: Add missing include | Olof Johansson | 1 | -0/+1 |
2017-11-30 | RISC-V: Use define for get_cycles like other architectures | Olof Johansson | 1 | -1/+2 |
2017-11-30 | RISC-V: io.h: type fixes for warnings | Olof Johansson | 1 | -7/+9 |
2017-11-30 | RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros | Olof Johansson | 2 | -9/+9 |
2017-11-30 | RISC-V: use generic serial.h | Olof Johansson | 1 | -0/+1 |
2017-11-28 | RISC-V: remove spin_unlock_wait() | Palmer Dabbelt | 1 | -9/+0 |
2017-11-28 | RISC-V: `sfence.vma` orderes the instruction cache | Palmer Dabbelt | 1 | -1/+4 |
2017-11-28 | RISC-V: Add READ_ONCE in arch_spin_is_locked() | Palmer Dabbelt | 1 | -1/+1 |
2017-11-28 | RISC-V: __test_and_op_bit_ord should be strongly ordered | Palmer Dabbelt | 1 | -1/+1 |
2017-11-28 | RISC-V: Remove smb_mb__{before,after}_spinlock() | Palmer Dabbelt | 1 | -8/+0 |
2017-11-28 | RISC-V: Remove __smp_bp__{before,after}_atomic | Palmer Dabbelt | 1 | -15/+0 |
2017-11-28 | RISC-V: Comment on why {,cmp}xchg is ordered how it is | Palmer Dabbelt | 1 | -2/+7 |
2017-11-28 | RISC-V: Remove unused arguments from ATOMIC_OP | Palmer Dabbelt | 1 | -47/+47 |
2017-11-15 | Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub... | Linus Torvalds | 58 | -0/+4916 |
2017-09-26 | RISC-V: Build Infrastructure | Palmer Dabbelt | 1 | -0/+61 |
2017-09-26 | RISC-V: User-facing API | Palmer Dabbelt | 15 | -0/+710 |
2017-09-26 | RISC-V: Paging and MMU | Palmer Dabbelt | 7 | -0/+910 |
2017-09-26 | RISC-V: Device, timer, IRQs, and the SBI | Palmer Dabbelt | 7 | -0/+364 |
2017-09-26 | RISC-V: Task implementation | Palmer Dabbelt | 6 | -0/+328 |
2017-09-26 | RISC-V: ELF and module implementation | Palmer Dabbelt | 3 | -0/+150 |
2017-09-26 | RISC-V: Generic library routines and assembly | Palmer Dabbelt | 6 | -0/+822 |
2017-09-26 | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 10 | -0/+1423 |
2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt | 3 | -0/+162 |