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path: root/arch/powerpc/include/asm/cputable.h
AgeCommit message (Expand)AuthorFilesLines
2013-05-06powerpc/cputable: Reserve bits in HWCAP2 for new featuresNishanth Aravamudan1-0/+2
2013-05-02powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207SMichael Ellerman1-4/+4
2013-04-30Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt1-1/+1
2013-04-26powerpc: Add HWCAP2 aux entryMichael Neuling1-0/+1
2013-03-12powerpc/85xx: Add AltiVec support for e6500Kumar Gala1-1/+1
2013-02-15powerpc: Add transactional memory to POWER8 cpu featuresMichael Neuling1-1/+2
2013-02-15powerpc: Add new CPU feature bit for transactional memoryMichael Neuling1-0/+7
2013-02-08powerpc: Add support for context switching the TAR registerIan Munsie1-1/+1
2013-01-10powerpc: Add DAWR CPU feature bit definitionMichael Neuling1-1/+2
2013-01-10powerpc: Repack 64bit CPU features to remove holesMichael Neuling1-24/+26
2013-01-10powerpc: Remove extra zeros from 32 bit CPU features definitionsMichael Neuling1-31/+31
2013-01-10powerpc: Enable PPR save/restoreHaren Myneni1-2/+4
2013-01-10powerpc: Hook up doorbells on serverIan Munsie1-1/+2
2012-11-15powerpc: POWER8 cputable entryMichael Neuling1-2/+10
2012-10-09UAPI: (Scripted) Disintegrate arch/powerpc/include/asmDavid Howells1-34/+1
2012-08-24powerpc: Remove unnecessary ifdefsMichael Neuling1-2/+0
2012-04-11KVM: PPC: add CPU_FTR_EMB_HV to CPU tableScott Wood1-1/+1
2012-04-08KVM: PPC: e500mc supportScott Wood1-2/+4
2012-04-08powerpc/e500: split CPU_FTRS_ALWAYS/CPU_FTRS_POSSIBLEScott Wood1-4/+8
2012-04-08powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on 32-bitScott Wood1-2/+3
2012-03-15powerpc: Add initial e6500 cpu supportKumar Gala1-4/+8
2011-12-19powerpc: POWER7 optimised copy_to_user/copy_from_user using VMXAnton Blanchard1-1/+2
2011-11-25powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2Jimi Xenidis1-1/+1
2011-07-12powerpc, KVM: Split HVMODE_206 cpu feature bit into separate HV and architect...Paul Mackerras1-6/+8
2011-05-19powerpc/fsl-booke64: Add support for Debug Level exception handlerKumar Gala1-1/+3
2011-05-04powerpc: Save Come-From Address Register (CFAR) in exception framePaul Mackerras1-2/+3
2011-05-04powerpc: Add Initiate Coprocessor Store Word (icswx) supportTseng-Hui (Frank) Lin1-1/+3
2011-04-27powerpc: Free up some CPU feature bits by moving out MMU-related featuresMatt Evans1-23/+14
2011-04-27powerpc: Add A2 cpu supportBenjamin Herrenschmidt1-2/+6
2011-04-20powerpc: Define CPU feature for Architected 2.06 HV modeBenjamin Herrenschmidt1-1/+2
2011-04-12powerpc/e500mc: Remove CPU_FTR_MAYBE_CAN_NAP/CPU_FTR_MAYBE_CAN_DOZEScott Wood1-2/+1
2011-04-12powerpc/book3e: Fix CPU feature handling on 64-bit e5500Kumar Gala1-0/+13
2011-02-02powerpc/476: define specific cpu table entry DD2 coreDave Kleikamp1-1/+2
2010-11-29powerpc: Add support for popcnt instructionsAnton Blanchard1-3/+6
2010-09-02powerpc: Feature nop out reservation clear when stcx checks addressAnton Blanchard1-5/+9
2010-08-06Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-1/+2
2010-06-22powerpc, hw_breakpoints: Implement hw_breakpoints for 64-bit server processorsK.Prasad1-0/+4
2010-06-09powerpc: Enable asymmetric SMT scheduling on POWER7Michael Neuling1-1/+2
2010-05-21powerpc/e500mc: Implement machine check handler.Scott Wood1-0/+1
2010-05-05powerpc/476: add machine check handler for 47x coreDave Kleikamp1-0/+1
2010-05-05powerpc/47x: Base ppc476 supportDave Kleikamp1-0/+4
2010-02-17powerpc: Use lwsync for acquire barrier if CPU supports itAnton Blanchard1-2/+2
2009-03-24Merge commit 'origin/master' into nextBenjamin Herrenschmidt1-1/+3
2009-03-17powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xxPiotr Ziecik1-1/+3
2009-02-23powerpc: Add support for using doorbells for SMP IPIKumar Gala1-1/+3
2008-12-21powerpc/mm: Introduce MMU featuresBenjamin Herrenschmidt1-48/+37
2008-12-21powerpc/4xx: Extended DCR support v2Benjamin Herrenschmidt1-2/+5
2008-12-15powerpc: Fix bogus cache flushing on all 40x and BookE processors v2Benjamin Herrenschmidt1-7/+8
2008-11-05powerpc: Add new CPU feature: CPU_FTR_UNALIGNED_LD_STDMark Nelson1-2/+4
2008-09-15powerpc: Add new CPU feature: CPU_FTR_CP_USE_DCBTZMark Nelson1-3/+6
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