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2013-03-18powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCsStephen George1-1/+1
Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13powerpc/85xx: fix various PCI node compatible stringsTimur Tabi1-3/+3
Fix and/or improve the compatible strings of the PCI device tree nodes for some Freescale SOCs. This fixes some issues and improves consistency among the SOCs. Specifically: 1) The P1022 has a v1 PCIe controller, so the compatible property should just say "fsl,mpc8548-pcie". U-Boot does not look for "fsl,p1022-pcie", so it wasn't fixing up the node. 2) The P4080 has a v2.1 PCIe controller, so add that version-specific string to the device tree. Update the kernel to also look for that string. Currently, the kernel looks for "fsl,p4080-pcie" specifically, but eventually that check should be deleted. 3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's redundant. No other device tree does this. Remove the v2.2 string. 4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2", even though the P1023 device trees has always included both strings. Remove the search for "fsl,p1023-pcie". Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13powerpc/85xx: describe the PAMU topology in the device treeTimur Tabi1-1/+67
The PAMU caches use the LIODNs to determine which cache lines hold the entries for the corresponding LIODs. The LIODNs must therefore be carefully assigned to avoid cache thrashing -- two active LIODs with LIODNs that put them in the same cache line. Currently, LIODNs are statically assigned by U-Boot, but this has limitations. LIODNs are assigned even for devices that may be disabled or unused by the kernel. Static assignments also do not allow for device drivers which may know which LIODs can be used simultaneously. In other words, we really should assign LIODNs dynamically in Linux. To do that, we need to describe the PAMU device and cache topologies in the device trees. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-08-10powerpc/p4080ds: dts - add usb controller version info and port0Shengzhou Liu1-0/+7
Add the missing usb controller version info and port0, which is required during setup usb phy. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24powerpc/85xx: Update SRIO device tree nodesKumar Gala1-9/+17
Update all dts files that support SRIO controllers to match the new fsl,srio device tree binding. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24powerpc/85xx: Rework P4080DS device treesKumar Gala1-0/+342
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Adding of MPIC timer blocks * Dropping "fsl,p4080-IP..." from compatibles for standard blocks * Removed mpic interrupt-parent from dcsr-epu node, just use top level * Removed mpic interrupt-parent from sec nodes, just use top level Signed-off-by: Kumar Gala <galak@kernel.crashing.org>