linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2012-07-24	MIPS: BCM63XX: Move the PCI initialization into its own function	Jonas Gorski	1	-8/+17
2012-07-24	MIPS: BCM63XX: Add basic BCM6328 support	Jonas Gorski	13	-9/+265
2012-07-24	MIPS: BCM63XX: Use the Chip ID register for identifying the SoC	Jonas Gorski	1	-8/+12
2012-07-24	MIPS: BCM63XX: Add flash type detection	Jonas Gorski	3	-6/+69
2012-07-24	MIPS: BCM63XX: Move flash registration out of board_bcm963xx.c	Jonas Gorski	4	-49/+79
2012-07-24	MIPS: BCM63XX: add RNG driver platform_device stub	Florian Fainelli	2	-2/+42
2012-07-24	MIPS: BCM63XX: add RNG peripheral definitions	Florian Fainelli	2	-0/+23
2012-07-24	MIPS: BCM63XX: add support for "ipsec" clock	Florian Fainelli	1	-0/+14
2012-07-24	MIPS: OCTEON: Remove some unused files.	David Daney	4	-492/+0
2012-07-24	MIPS: BCM63XX: Fix platform_devices id	Florian Fainelli	2	-2/+2
2012-07-23	MIPS: Add CPU support for Loongson1B	Kelvin Cheung	7	-144/+171
2012-07-23	MIPS: Enable vmlinuz for JZ4740	Lluís Batlle i Rossell	3	-0/+10
2012-07-23	MIPS: JZ4740: reset: Initialize hibernate wakeup counters.	Maarten ter Huurne	1	-5/+44
2012-07-23	MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.	Maarten ter Huurne	1	-0/+1
2012-07-23	MTD: NAND: JZ4740: Multi-bank support with autodetection	Maarten ter Huurne	2	-1/+23
2012-07-23	MIPS: Fixup ordering of micro assembler instructions.	Steven J. Hill	2	-81/+81
2012-07-23	MIPS: Unify memcpy.S and memcpy-inatomic.S	David Daney	4	-455/+15
2012-07-23	MIPS: Octeon: Implement Octeon specific __copy_user_inatomic	David Daney	1	-4/+12
2012-07-23	MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.	Ralf Baechle	1	-0/+14
2012-07-23	MIPS: PCI: Add missing __devinit attributions to fixup functions.	Ralf Baechle	4	-9/+9
2012-07-23	MIPS: Alchemy: Use kmemdup rather than duplicating its implementation	Thomas Meyer	1	-6/+4
2012-07-23	MIPS: loongson: use IS_ENABLED()	Florian Fainelli	1	-1/+2
2012-07-23	MIPS: DEC: use IS_ENABLED()	Florian Fainelli	1	-1/+1
2012-07-23	MIPS: TX49XX: use IS_ENABLED()	Florian Fainelli	1	-1/+1
2012-07-23	MIPS: TXX9: use IS_ENABLED() macro	Florian Fainelli	3	-14/+11
2012-07-23	MIPS: PNX833x: use IS_ENABLED() macro	Florian Fainelli	1	-2/+2
2012-07-23	MIPS: Alchemy: use IS_ENABLED() macro	Florian Fainelli	3	-6/+6
2012-07-23	MIPS: SMTC: Support for Multi-threaded FPUs	Steven J. Hill	4	-9/+90
2012-07-23	MIPS: Remove dead code related to 1004K oprofile support.	Steven J. Hill	1	-6/+0
2012-07-23	MIPS: Octeon: Use device tree to register serial ports.	David Daney	2	-85/+53
2012-07-23	netdev: octeon_mgmt: Convert to use device tree.	David Daney	2	-64/+0
2012-07-23	netdev: mdio-octeon.c: Convert to use device tree.	David Daney	1	-30/+0
2012-07-23	i2c: Convert i2c-octeon.c to use device tree.	David Daney	3	-91/+0
2012-07-23	MIPS: Octeon: Setup irq_domains for interrupts.	David Daney	1	-9/+206
2012-07-23	MIPS: Octeon: Initialize and fixup device tree.	David Daney	4	-1/+572
2012-07-23	MIPS: Prune some target specific code out of prom.c	David Daney	4	-32/+35
2012-07-23	MIPS: Octeon: Add device tree source files.	David Daney	4	-0/+1211
2012-07-23	MIPS: OCTEON: Consolidate the edge and level irq_chip structures.	David Daney	1	-28/+2
2012-07-23	MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.	David Daney	2	-81/+2
2012-07-23	MIPS: Octeon: Remove use of OCTEON_IRQ_RST.	David Daney	1	-2/+3
2012-07-23	MIPS: Octeon: Add irq handlers for GPIO interrupts.	David Daney	1	-1/+110
2012-07-23	MIPS: OCTEON: Remove some unused files.	David Daney	4	-492/+0
2012-07-23	MIPS: BCM63xx: Make board setup code register the spi platform device	Florian Fainelli	1	-0/+3
2012-07-23	MIPS: BCM63xx: Add stub to register the SPI platform driver	Florian Fainelli	3	-1/+210
2012-07-23	MIPS: BCM63xx: Define internal registers offsets of the SPI controller	Florian Fainelli	1	-0/+119
2012-07-23	MIPS: BCM63xx: Remove SPI2 register	Florian Fainelli	1	-9/+1
2012-07-23	MIPS: BCM63xx: Define SPI register sizes.	Florian Fainelli	1	-0/+4
2012-07-23	MIPS: BCM63xx: Add BCM6368 SPI clock mask	Florian Fainelli	1	-2/+4
2012-07-23	MIPS: BCM63xx: Define BCM6358 SPI base address	Florian Fainelli	1	-1/+1
2012-07-23	MIPS: BCM63xx: Add IRQ_SPI and CPU specific SPI IRQ values	Florian Fainelli	1	-0/+7