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path: root/arch/mips/kernel/cpu-probe.c
AgeCommit message (Expand)AuthorFilesLines
2009-11-02MIPS: SPRAM: Clean up support code a littleChris Dearman1-7/+1
2009-09-17MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.Maxime Bizon1-0/+23
2009-09-17MIPS: Remove useless zero initializations.Ralf Baechle1-2/+2
2009-09-17MIPS: Alchemy: get rid of allow_au1k_waitManuel Lauss1-8/+5
2009-06-24MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle1-0/+1
2009-03-30MIPS: Alchemy: unify CPU model constants.Manuel Lauss1-17/+4
2009-03-11MIPS: NEC VR5500 processor support fixupShinya Kuribayashi1-0/+1
2009-01-11MIPS: Alchemy: RTC counter clocksource / clockevent support.Manuel Lauss1-2/+4
2009-01-11MIPS: Add Cavium OCTEON processor constants and CPU probe.David Daney1-0/+25
2008-10-30MIPS: Sort out CPU type to name translation.Ralf Baechle1-127/+98
2008-10-30MIPS: Probe for watch registers on cores of all vendors, not just MTI.Ralf Baechle1-10/+12
2008-10-11MIPS: Probe watch registers and report configuration.David Daney1-0/+2
2008-10-03[MIPS] SMTC: Fix SMTC dyntick support.Kevin D. Kissell1-3/+7
2008-09-21[MIPS] Fix potential latency problem due to non-atomic cpu_wait.Atsushi Nemoto1-14/+2
2008-04-28[MIPS] Move arch/mips/philips to arch/mips/nxpDaniel Laird1-4/+4
2008-04-28[MIPS] Add support for MIPS CMP platform.Ralf Baechle1-0/+5
2008-04-28[MIPS] Basic SPRAM supportChris Dearman1-0/+8
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle1-5/+5
2008-01-29[MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss1-0/+9
2007-11-15[MIPS] Fix shadow register support.Ralf Baechle1-0/+5
2007-10-11[MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type.Franck Bui-Huu1-0/+8
2007-10-11[MIPS] Make facility to convert CPU types to strings generally available.Ralf Baechle1-2/+91
2007-10-11[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle1-8/+0
2007-10-11[MIPS] Add support for BCM47XX CPUs.Aurelien Jarno1-0/+20
2007-09-14[MIPS] 20Kc: Disable use of WAIT instruction.Ralf Baechle1-1/+8
2007-07-20[MIPS] Workaround for RM7000 WAIT instruction aka erratum 38Ralf Baechle1-1/+25
2007-07-10[MIPS] PMC MSP71xx mips commonMarc St-Jean1-0/+20
2007-07-10[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang1-0/+8
2007-07-10[MIPS] Enable support for the userlocal hardware registerRalf Baechle1-0/+2
2007-07-06[MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle1-2/+13
2007-06-26[MIPS] 20K: Handle WAIT related bugs according to errata informationRalf Baechle1-1/+11
2007-02-20[MIPS] Make some __setup functions staticAtsushi Nemoto1-1/+1
2007-02-18[MIPS] Include <asm/bugs> to for declaration of check_bugs32.Ralf Baechle1-0/+1
2007-02-06[MIPS] Whitespace cleanups.Ralf Baechle1-1/+1
2006-11-30[MIPS] Don't print presence of WAIT instruction on bootup.Ralf Baechle1-16/+3
2006-10-09[MIPS] Fix RM9000 wait instruction detection.Ralf Baechle1-1/+8
2006-09-27[MIPS] Reduce race between cpu_wait() and need_resched() checkingAtsushi Nemoto1-17/+45
2006-07-13[MIPS] Save 2k text size in cpu-probeThiemo Seufer1-1/+1
2006-07-13[MIPS] Uses MIPS_CONF_AR instead of magic constants.Thiemo Seufer1-2/+2
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel1-1/+0
2006-06-29[MIPS] MIPS32/MIPS64 secondary cache managementChris Dearman1-2/+0
2006-06-06[MIPS] SB1: Only pass1 FPUs are broken beyond recovery.Ralf Baechle1-1/+1
2006-06-01[MIPS] Treat R14000 like R10000.Kumba1-0/+9
2006-06-01[MIPS] Fix detection and handling of the 74K processor.Chris Dearman1-0/+4
2006-03-21[MIPS] War on whitespace: cleanup initial spaces followed by tabs.Ralf Baechle1-3/+3
2006-02-07[MIPS] Get rid of CONFIG_SB1_PASS_1_WORKAROUNDS #ifdef crapola.Ralf Baechle1-4/+3
2006-01-10MIPS: Introduce machinery for testing for MIPSxxR1/2.Ralf Baechle1-5/+30
2006-01-10MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.Ralf Baechle1-6/+6
2005-12-01[MIPS] R10000 and R12000 need to set MIPS_CPU_4K_CACHE ...Ralf Baechle1-2/+2
2005-10-29Add support for SB1A CPU.Andrew Isaacson1-0/+3
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