linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2015-03-27	MIPS: KVM: Expose MSA registers	James Hogan	1	-2/+10
2015-03-27	MIPS: KVM: Add MSA exception handling	James Hogan	1	-0/+16
2015-03-27	MIPS: KVM: Add base guest MSA support	James Hogan	1	-1/+20
2015-03-27	MIPS: KVM: Expose FPU registers	James Hogan	1	-10/+27
2015-03-27	MIPS: KVM: Add FP exception handling	James Hogan	1	-0/+8
2015-03-27	MIPS: KVM: Add base guest FPU support	James Hogan	1	-0/+27
2015-03-27	MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callback	James Hogan	1	-0/+2
2015-03-27	MIPS: KVM: Add Config4/5 and writing of Config registers	James Hogan	1	-0/+13
2015-03-27	MIPS: KVM: Simplify default guest Config registers	James Hogan	1	-25/+0
2015-03-27	MIPS: KVM: Clean up register definitions a little	James Hogan	2	-55/+68
2015-03-27	MIPS: KVM: Implement PRid CP0 register access	James Hogan	1	-0/+1
2015-03-27	MIPS: KVM: Handle TRAP exceptions from guest kernel	James Hogan	1	-0/+8
2015-03-27	MIPS: Clear [MSA]FPE CSR.Cause after notify_die()	James Hogan	1	-1/+2
2015-03-27	MIPS: KVM: Handle MSA Disabled exceptions from guest	James Hogan	1	-0/+2
2015-03-27	MIPS: MSA: Fix big-endian FPR_IDX implementation	James Hogan	1	-1/+1
2015-03-27	Revert "MIPS: Don't assume 64-bit FP registers for context switch"	James Hogan	2	-128/+128
2015-03-27	MIPS: disable FPU if the mode is unsupported	Paul Burton	1	-7/+12
2015-03-27	MIPS: wrap cfcmsa & ctcmsa accesses for toolchains with MSA support	Paul Burton	1	-4/+20
2015-03-27	MIPS: remove MSA macro recursion	Paul Burton	1	-3/+31
2015-03-27	MIPS: assume at as source/dest of MSA copy/insert instructions	Paul Burton	1	-16/+12
2015-03-27	MIPS: Push .set mips64r* into the functions needing it	Paul Burton	1	-8/+4
2015-03-27	MIPS: lose_fpu(): Disable FPU when MSA enabled	James Hogan	1	-0/+1
2015-02-21	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds	47	-408/+1166
2015-02-20	MIPS: OCTEON: More OCTEONIII support	Chandrakala Chavva	2	-0/+309
2015-02-20	MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.	Chad Reese	1	-20/+0
2015-02-20	MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.	David Daney	1	-3/+16
2015-02-20	MIPS: OCTEON: Update octeon-model.h code for new SoCs.	David Daney	1	-22/+85
2015-02-20	MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX	David Daney	1	-0/+3
2015-02-20	MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h	David Daney	1	-30/+105
2015-02-20	MIPS: OCTEON: Implement the core-16057 workaround	David Daney	1	-0/+22
2015-02-20	MIPS: OCTEON: Save and restore CP2 SHA3 state	David Daney	1	-0/+2
2015-02-20	MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs	David Daney	2	-2/+15
2015-02-20	MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h	David Daney	1	-6/+0
2015-02-20	MIPS: ip22-gio: Remove legacy suspend/resume support	Lars-Peter Clausen	1	-2/+0
2015-02-20	mips: pci: Add ifdef around pci_proc_domain	Zubair Lutfullah Kakakhel	1	-0/+2
2015-02-20	MIPS: Add set/clear CP0 macros for PageGrain register	Steven J. Hill	1	-0/+1
2015-02-19	MIPS: Usage and cosmetic cleanups of page table bits.	Steven J. Hill	2	-62/+38
2015-02-19	Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...	Ralf Baechle	29	-180/+497
2015-02-19	MIPS: Provide correct siginfo_t.si_stime	Petr Malat	2	-37/+3
2015-02-18	Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtd	Linus Torvalds	1	-2/+0
2015-02-17	MIPS: kernel: elf: Improve the overall ABI and FPU mode checks	Markos Chandras	1	-4/+6
2015-02-17	MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6	Markos Chandras	1	-1/+2
2015-02-17	MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well	Markos Chandras	1	-1/+2
2015-02-17	MIPS: Make use of the ERETNC instruction on MIPS R6	Markos Chandras	2	-4/+7
2015-02-17	MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6	Leonid Yegoshin	2	-3/+96
2015-02-17	MIPS: asm: mipsregs: Add support for the LLADDR register	Markos Chandras	1	-0/+2
2015-02-17	MIPS: Add LLB bit and related feature for the Config 5 CP0 register	Markos Chandras	3	-0/+5
2015-02-17	MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions	Markos Chandras	1	-1/+1
2015-02-17	MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions	Markos Chandras	1	-1/+1
2015-02-17	MIPS: Emulate the new MIPS R6 BALC instruction	Markos Chandras	1	-1/+1