linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2016-11-24	MIPS: Mask out limit field when calculating wired entry count	Paul Burton	1	-0/+6
2016-09-29	MIPS: Stop setting I6400 FTLBP	Paul Burton	1	-2/+0
2016-06-15	MIPS: Add define for Config.VI (virtual icache) bit	James Hogan	1	-0/+1
2016-06-15	MIPS: Clean up RDHWR handling	James Hogan	1	-1/+19
2016-05-28	MIPS: Add 64-bit HTW fields	James Hogan	1	-0/+8
2016-05-28	MIPS: Simplify DSP instruction encoding macros	James Hogan	1	-90/+17
2016-05-28	MIPS: Add missing tlbinvf/XPA microMIPS encodings	James Hogan	1	-5/+7
2016-05-28	MIPS: Add missing VZ accessor microMIPS encodings	James Hogan	1	-9/+18
2016-05-28	MIPS: Add inline asm encoding helpers	James Hogan	1	-0/+27
2016-05-28	MIPS: Fix write_gc0_* macros when writing zero	James Hogan	1	-2/+2
2016-05-28	MIPS: Add definitions of SegCtl registers and use them	Matt Redfearn	1	-0/+3
2016-05-17	MIPS: Fix VZ probe gas errors with binutils <2.24	James Hogan	1	-180/+293
2016-05-13	MIPS: Add guest CP0 accessors	James Hogan	1	-11/+330
2016-05-13	MIPS: Add register definitions for VZ ASE registers	James Hogan	1	-0/+117
2016-05-13	MIPS: Avoid magic numbers probing kscratch_mask	James Hogan	1	-1/+2
2016-05-13	MIPS: Add defs & probing of [X]ContextConfig	James Hogan	1	-0/+6
2016-05-13	MIPS: Add defs & probing of BadInstr[P] registers	James Hogan	1	-0/+3
2016-05-13	MIPS: Add defs & probing of extended CP0_EBase	James Hogan	1	-0/+3
2016-05-13	MIPS: Define & use CP0_EBase bit definitions	James Hogan	1	-1/+9
2016-05-13	MIPS: Add & use CP0_EntryHi ASID definitions	James Hogan	1	-0/+2
2016-05-13	MIPS: Loongson-3: Fast TLB refill handler	Huacai Chen	1	-0/+6
2016-05-13	MIPS: Loongson: Invalidate special TLBs when needed	Huacai Chen	1	-0/+9
2016-05-13	MIPS: Loongson: Add Loongson-3A R2 basic support	Huacai Chen	1	-0/+2
2016-05-13	MIPS: Add and use watch register field definitions	James Hogan	1	-0/+18
2016-05-13	MIPS: Add and use CAUSEF_WP definition	James Hogan	1	-0/+2
2016-05-13	MIPS: Detect MIPSr6 Virtual Processor support	Paul Burton	1	-0/+1
2016-01-24	MIPS: Update trap codes	James Hogan	1	-2/+10
2016-01-24	MIPS: Move Cause.ExcCode trap codes to mipsregs.h	James Hogan	1	-0/+24
2016-01-24	MIPS: Move definition of DC bit to mipsregs.h	James Hogan	1	-0/+2
2015-11-11	MIPS: Tidy EntryLo bit definitions, add PFN	Paul Burton	1	-9/+3
2015-11-11	MIPS: CPS: Early debug using an ns16550-compatible UART	Paul Burton	1	-0/+3
2015-11-11	MIPS: Fix duplicate CP0_* definitions.	James Hogan	1	-0/+3
2015-09-22	MIPS: cpu-features: Add cpu_has_ftlb	James Hogan	1	-0/+2
2015-09-03	MIPS: Rearrange ENTRYLO field definitions	James Hogan	1	-25/+27
2015-09-03	MIPS: Treat CP1 control registers as unsigned ints.	Ralf Baechle	1	-1/+1
2015-09-03	MIPS: Use unsigned int when reading CP0 registers	Chris Packham	1	-2/+2
2015-08-26	MIPS: Set up FTLB probability for I6400	Markos Chandras	1	-0/+2
2015-06-21	MIPS: R12000: Enable branch prediction global history	Joshua Kinard	1	-0/+13
2015-06-21	MIPS: mipsregs.h: Add EntryLo bit definitions	James Hogan	1	-0/+22
2015-04-08	MIPS: math-emu: Define IEEE 754-2008 feature control bits	Maciej W. Rozycki	1	-2/+7
2015-04-08	MIPS: math-emu: Implement the FCCR, FEXR and FENR registers	Maciej W. Rozycki	1	-12/+57
2015-04-08	MIPS: mipsregs.h: Reindent CP0 Cause macros	Maciej W. Rozycki	1	-16/+16
2015-04-08	MIPS: mipsregs.h: Move TX39 macros out of the way	Maciej W. Rozycki	1	-33/+33
2015-04-08	MIPS: mipsregs.h: Reorder CP1 macro definitions	Maciej W. Rozycki	1	-72/+75
2015-04-08	MIPS: mipsregs.h: Remove broken comments	Maciej W. Rozycki	1	-6/+0
2015-03-31	MIPS: Add architectural FDC IRQ fields	James Hogan	1	-0/+4
2015-03-31	MIPS: Add arch CDMM definitions and probing	James Hogan	1	-0/+11
2015-02-21	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds	1	-0/+4
2015-02-20	MIPS: Add set/clear CP0 macros for PageGrain register	Steven J. Hill	1	-0/+1
2015-02-17	MIPS: asm: mipsregs: Add support for the LLADDR register	Markos Chandras	1	-0/+2