summaryrefslogtreecommitdiffstats
path: root/arch/mips/boot/dts/ingenic
AgeCommit message (Collapse)AuthorFilesLines
2020-11-17MIPS: Ingenic: Add missing nodes for Ingenic SoCs and boards.周琰杰 (Zhou Yanjie)6-19/+313
1.Add OTG/OTG PHY/RNG nodes for JZ4780, CGU/OTG nodes for CI20. 2.Add OTG/OTG PHY/RNG/OST nodes for X1000, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1000-Neo. 3.Add OTG/OTG PHY/DTRNG/OST nodes for X1830, SSI/CGU/OST/OTG/SC16IS752 nodes for CU1830-Neo. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Tested by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-12mips: dts: jz47x: Harmonize EHCI/OHCI DT nodes nameSerge Semin2-2/+2
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-21MIPS: Ingenic: Add CPU nodes for Ingenic SoCs.周琰杰 (Zhou Yanjie)6-1/+93
Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi, jz4780.dtsi, x1000.dtsi, and x1830.dtsi files. Tested-by: H. Nikolaus Schaller <hns@goldelico.com> Tested-by: Paul Boddie <paul@boddie.org.uk> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: dts/ingenic: Cleanup qi_lb60.dtsPaul Cercueil1-69/+68
Cleanup a bit the Device Tree file: 1. Respect the number of cells in GPIO descriptors and keyboard matrix; 2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller' property; 3. The NAND's rb-gpios is actually active high; 3. The FRE/FWE pins must be configured in the proper mode for the NAND to work if it was not already done by the bootloader. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-08-06Merge tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds8-123/+1274
Pull MIPS upates from Thomas Bogendoerfer: - improvements for Loongson64 - extended ingenic support - removal of not maintained paravirt system type - cleanups and fixes * tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (81 commits) MIPS: SGI-IP27: always enable NUMA in Kconfig MAINTAINERS: Update KVM/MIPS maintainers MIPS: Update default config file for Loongson-3 MIPS: KVM: Add kvm guest support for Loongson-3 dt-bindings: mips: Document Loongson kvm guest board MIPS: handle Loongson-specific GSExc exception MIPS: add definitions for Loongson-specific CP0.Diag1 register MIPS: only register FTLBPar exception handler for supported models MIPS: ingenic: Hardcode mem size for qi,lb60 board MIPS: DTS: ingenic/qi,lb60: Add model and memory node MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB MIPS: head.S: Init fw_passed_dtb to builtin DTB of: address: Fix parser address/size cells initialization of_address: Guard of_bus_pci_get_flags with CONFIG_PCI MIPS: DTS: Fix number of msi vectors for Loongson64G MIPS: Loongson64: Add ISA node for LS7A PCH MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH MIPS: Loongson64: Enlarge IO_SPACE_LIMIT MIPS: Loongson64: Process ISA Node in DeviceTree of_address: Add bus type match for pci ranges parser ...
2020-07-31MIPS: DTS: ingenic/qi,lb60: Add model and memory nodePaul Cercueil1-0/+6
Add a memory node, which was missing until now, and use the retail name "Ben Nanonote" as the model, as it is way more known under that name than under the name "LB60". Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: qi_lb60: Fix routing to audio amplifierPaul Cercueil1-1/+1
The ROUT (right channel output of audio codec) was connected to INL (left channel of audio amplifier) instead of INR (right channel of audio amplifier). Fixes: 8ddebad15e9b ("MIPS: qi_lb60: Migrate to devicetree") Cc: stable@vger.kernel.org # v5.3 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26MIPS: ingenic: JZ4725B: Add IPU nodePaul Cercueil2-1/+35
Add a devicetree node for the Image Processing Unit (IPU) found in the JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver will expect the IPU node to be accessed through graph port #8, as stated in the bindings documentation. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: Ingenic: Fix bugs and add missing LED node for X1000.周琰杰 (Zhou Yanjie)2-122/+118
1.The CU1000-Neo board actually uses X1000E instead of X1000, so the wrongly written "ingenic,x1000" in compatible should be changed to "ingenic,x1000e". 2.Adjust the order of nodes according to the corresponding address value. 3.Drop unnecessary node in "wlan_pwrseq". 4.Add the leds node to "cu1000-neo.dts". Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: Ingenic: Add YSH & ATIL CU Neo board support.周琰杰 (Zhou Yanjie)2-0/+169
Add a device tree and a defconfig for the Ingenic X1830 based YSH & ATIL CU Neo board. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: Ingenic: Add Ingenic X1830 support.周琰杰 (Zhou Yanjie)1-0/+300
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740. This is left unselectable in Kconfig until a X1830 based board is added in a later commit. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: ingenic: Add support for the RS90 boardPaul Cercueil2-0/+312
The RS-90, better known as RetroMini, is a small and pocketable handheld gaming console from YLMChina. It has little more than a JZ4725B SoC, a NAND, a screen, some buttons and a speaker. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: ingenic: Add support for the JZ4725B SoCPaul Cercueil1-0/+334
Add preliminary support for boards based on the JZ4725B SoC from Ingenic. The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its internals are much closer to what can be found on the JZ4750 and newer SoCs. It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25MIPS: ingenic: gcw0: Fix HP detection GPIO.João H. Spies1-1/+1
Previously marked as active high, but is in reality active low. Cc: stable@vger.kernel.org Fixes: b1bfdb660516 ("MIPS: ingenic: DTS: Update GCW0 support") Signed-off-by: João H. Spies <jhlspies@gmail.com> Tested-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-27MIPS: ingenic: Add support for GCW Zero prototypePaul Cercueil1-0/+13
Add support for the GCW Zero prototype. The only (?) difference is that it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail device. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-27MIPS: ingenic: DTS: Add memory info of GCW ZeroPaul Cercueil1-0/+6
Add memory info of the GCW Zero in its devicetree. The bootloader generally provides this information, but since it is fixed to 512 MiB, it doesn't hurt to have it in devicetree. It allows the kernel to boot without any parameter passed as argument. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Update GCW0 supportPaul Cercueil1-15/+484
Add support for the face buttons, the ACT8600 PMUC, the LCD panel with backlight, the rumble, internal/external SD readers, and other things. Note that the otg-phy node was dropped in the process as it was neither useful nor used, and was inside a non-compliant board "bus". Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Update JZ4770 supportPaul Cercueil1-7/+170
Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD, USB OTG, USB PHY controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Add nodes for the watchdog/PWM/OSTPaul Cercueil3-0/+72
Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Respect cell count of common propertiesPaul Cercueil4-36/+30
If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N*X) cells. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-29MIPS: ingenic: DTS: Fix invalid value in #dma-cellsPaul Cercueil1-2/+2
The driver requires two cells and not just one. Since these nodes are both disabled as no hardware currently use them, this fix does not really requires a Fixes: tag. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-19MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the ↵H. Nikolaus Schaller1-0/+3
default MAC address There is a unique MAC address programmed into the eFuses of the JZ4780 chip in the CI20 factory. By using this for initializing the DM9000 Ethernet controller, every CI20 board has an individual - but stable - MAC address and DHCP can assign stable IP addresses. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-19MIPS: DTS: JZ4780: define node for JZ4780 efusePrasannaKumar Muralidharan1-2/+17
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and the ethernet mac address for the davicom dm9000 chip on the CI20 board. It also changes the nemc ranges definition to give the driver access to the efuse registers, which are in the middle of the nemc reg range. Tested-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-23MIPS: DTS: CI20: multiple DTS improvementsH. Nikolaus Schaller1-0/+14
a) add DT node for SW1 as Enter button The SW1 button can be used as a simple one-button keyboard and is connected to PD17. Note: SW1 has a second meaning to change the boot sequence when pressed while powering on. b) give eth0_power a defined voltage. This is a 3.3V power switch (DVNET3.3V). Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-23MIPS: DTS: CI20: add DT node for IR sensorAlex Smith1-0/+5
The infrared sensor on the CI20 board is connected to a GPIO and can be operated by using the gpio-ir-recv driver. Add a DT node for the sensor to allow that driver to be used. Signed-off-by: Alex Smith <alex.smith@imgtec.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-07MIPS: DTS: CI20: fix interrupt for pcf8563 RTCH. Nikolaus Schaller1-1/+4
Interrupts should not be specified by interrupt line but by gpio parent and reference. Fixes: 73f2b940474d ("MIPS: CI20: DTS: Add I2C nodes") Cc: stable@vger.kernel.org Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-07MIPS: DTS: CI20: fix PMU definitions for ACT8600H. Nikolaus Schaller1-15/+24
There is a ACT8600 on the CI20 board and the bindings of the ACT8865 driver have changed without updating the CI20 device tree. Therefore the PMU can not be probed successfully and is running in power-on reset state. Fix DT to match the latest act8865-regulator bindings. Fixes: 73f2b940474d ("MIPS: CI20: DTS: Add I2C nodes") Cc: stable@vger.kernel.org Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-02-19MIPS: ingenic: DTS: Fix watchdog nodesPaul Cercueil2-16/+18
The devicetree ABI was broken on purpose by commit 6d532143c915 ("watchdog: jz4740: Use regmap provided by TCU driver"), and commit 1d9c30745455 ("watchdog: jz4740: Use WDT clock provided by TCU driver"). The commit message of the latter explains why the ABI was broken. However, the current devicetree files were not updated to the new ABI described in Documentation/devicetree/bindings/timer/ingenic,tcu.txt, so the watchdog driver would not probe. Fix this problem by updating the watchdog nodes to comply with the new ABI. Fixes: 6d532143c915 ("watchdog: jz4740: Use regmap provided by TCU driver") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Zhou Yanjie <zhouyanjie@wanyeetech.com> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: <stable@vger.kernel.org> # v5.5+
2020-02-19MIPS: X1000: Fix clock of watchdog node.周琰杰 (Zhou Yanjie)1-4/+2
The devicetree ABI was broken on purpose by commit 6d532143c915 ("watchdog: jz4740: Use regmap provided by TCU driver"), and commit 1d9c30745455 ("watchdog: jz4740: Use WDT clock provided by TCU driver"). The commit message of the latter explains why the ABI was broken. However, the current devicetree files were not updated to the new ABI described in Documentation/devicetree/bindings/timer/ingenic,tcu.txt, so the watchdog driver would not probe. Fix this problem by updating the clock of watchdog node from "&cgu X1000_CLK_RTCLK" to "&tcu TCU_CLK_WDT" to comply with the new ABI. Fixes: 7a16ccd300c2 ("[v8,1/4] MIPS: Ingenic: Add Ingenic X1000 support."). Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: paul@crapouillou.net Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: sernia.zhou@foxmail.com Cc: zhenwenjin@gmail.com Cc: dongsheng.qiu@ingenic.com
2020-01-15MIPS: Ingenic: Add missing nodes for X1000 and CU1000-Neo.周琰杰 (Zhou Yanjie)2-0/+116
Add I2C0/I2C1/I2C2 nodes for X1000 and add I2C0, ADS7830, MSC1, AP6212A, wlan_pwrseq nodes for CU1000-Neo. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: robh+dt@kernel.org Cc: paul.burton@mips.com Cc: jhogan@kernel.org Cc: mark.rutland@arm.com Cc: syq@debian.org Cc: ralf@linux-mips.org Cc: rick.tyliu@ingenic.com Cc: jason@lakedaemon.net Cc: keescook@chromium.org Cc: geert+renesas@glider.be Cc: krzk@kernel.org Cc: paul@crapouillou.net Cc: prasannatsmkumar@gmail.com Cc: sernia.zhou@foxmail.com Cc: zhenwenjin@gmail.com Cc: ebiederm@xmission.com
2020-01-09MIPS: Ingenic: Add YSH & ATIL CU Neo board support.周琰杰 (Zhou Yanjie)2-0/+100
Add a device tree for the Ingenic X1000 based YSH & ATIL CU Neo board. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> [paulburton@kernel.org: Drop stale mention of previously unselectable Kconfig entry.] Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: robh+dt@kernel.org Cc: paul.burton@mips.com Cc: jhogan@kernel.org Cc: mripard@kernel.org Cc: shawnguo@kernel.org Cc: mark.rutland@arm.com Cc: alexandre.belloni@bootlin.com Cc: ralf@linux-mips.org Cc: heiko@sntech.de Cc: icenowy@aosc.io Cc: ak@linux.intel.com Cc: laurent.pinchart@ideasonboard.com Cc: krzk@kernel.org Cc: geert+renesas@glider.be Cc: prasannatsmkumar@gmail.com Cc: keescook@chromium.org Cc: ebiederm@xmission.com Cc: sernia.zhou@foxmail.com Cc: zhenwenjin@gmail.com Cc: 772753199@qq.com
2020-01-09MIPS: Ingenic: Add Ingenic X1000 support.周琰杰 (Zhou Yanjie)1-0/+272
Support the Ingenic X1000 SoC using the code under arch/mips/jz4740. This is left unselectable in Kconfig until a X1000 based board is added in a later commit. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: robh+dt@kernel.org Cc: paul.burton@mips.com Cc: jhogan@kernel.org Cc: mripard@kernel.org Cc: shawnguo@kernel.org Cc: mark.rutland@arm.com Cc: alexandre.belloni@bootlin.com Cc: ralf@linux-mips.org Cc: heiko@sntech.de Cc: icenowy@aosc.io Cc: ak@linux.intel.com Cc: laurent.pinchart@ideasonboard.com Cc: krzk@kernel.org Cc: geert+renesas@glider.be Cc: paul@crapouillou.net Cc: prasannatsmkumar@gmail.com Cc: keescook@chromium.org Cc: ebiederm@xmission.com Cc: sernia.zhou@foxmail.com Cc: zhenwenjin@gmail.com Cc: 772753199@qq.com
2019-10-07MIPS: CI20: DTS: Add LedsAlexandre GRIVEAUX1-0/+28
Adding leds and related triggers. Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org
2019-10-07MIPS: CI20: DTS: Add IW8103 Wifi + bluetoothAlexandre GRIVEAUX1-0/+39
Add IW8103 Wifi + bluetooth module to device tree and related power domain. Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org
2019-10-07MIPS: CI20: DTS: Add I2C nodesAlexandre GRIVEAUX1-0/+147
Adding missing I2C nodes and some peripheral: - PMU - RTC Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org
2019-10-07MIPS: JZ4780: DTS: Add I2C nodesAlexandre GRIVEAUX1-0/+86
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled by default. Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org
2019-08-08Merge branch 'ingenic-tcu-v5.4' into mips-nextPaul Burton6-1/+90
Merge the Ingenic TCU patchset from the ingenic-tcu-v5.4 branch which was created to enable follow-on changes in other subsystems. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-08-08MIPS: GCW0: Reduce system timer and clocksource to 750 kHzPaul Cercueil1-0/+10
The default clock (12 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: CI20: Reduce system timer and clocksource to 3 MHzPaul Cercueil1-0/+7
The default clock (48 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHzPaul Cercueil1-0/+7
The default clock (12 MHz) is too fast for the system timer, which fails to report time accurately. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-08-08MIPS: jz4740: Add DTS nodes for the TCU driversPaul Cercueil3-0/+66
Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: od@zcrc.me
2019-07-30MIPS: qi_lb60: Migrate to devicetreePaul Cercueil1-1/+287
Move all the platform data to devicetree. The only bit dropped is the PWM beeper, which requires the PWM driver to be updated. I figured it's okay to remove it here since it's really a non-critical device, and it'll be re-introduced soon enough. The other change is the CS line of the SPI is now set as active low. The SPI core would have forced "active low" anyway, unless the 'spi-cs-high' property is set. In the process of moving to devicetree, we also switched to new drivers: - We use the simple-audio-card and simple-amplifier drivers instead of the custom ASoC code; - We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0 DRM panel driver instead of the old framebuffer driver; - We use the new jz4780-dma driver instead of the old jz4740-dma one; - We use the ingenic-nand and jz4740-ecc drivers instead of the old jz4740-nand driver; - We use ingenic-battery instead of jz4740-battery; - We use iio-hwmon instead of jz4740-hwmon; - We use ingenic-iio instead of the old jz4740-adc MFD driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> [paul.burton@mips.com: Drop the unused & undocumented ili8960 spi@0 node.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-30MIPS: DTS: jz4740: Add missing nodesPaul Cercueil1-0/+84
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory, and BCH controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-22MIPS: qi_lb60: Move MMC configuration to devicetreePaul Cercueil1-0/+33
Move the MMC configuration from the board C file to devicetree. The 'power' GPIO was removed and instead the vmmc regulator is used, to follow the changes introduced in the jz4740-mmc driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-21MIPS: DTS: jz4740: Add node for the MMC driverPaul Cercueil1-3/+18
Add a devicetree node for the jz4740-mmc driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mmc@vger.kernel.org
2019-01-25DTS: CI20: Fix bugs in ci20's device tree.Zhou Yanjie1-4/+4
According to the Schematic, the hardware of ci20 leads to uart3, but not to uart2. Uart2 is miswritten in the original code. Signed-off-by: Zhou Yanjie <zhouyanjie@cduestc.edu.cn> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips <linux-mips@vger.kernel.org> Cc: linux-kernel <linux-kernel@vger.kernel.org> Cc: devicetree@vger.kernel.org Cc: robh+dt@kernel.org Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: mark.rutland@arm.com Cc: malat@debian.org Cc: ezequiel@collabora.co.uk Cc: ulf.hansson@linaro.org Cc: syq <syq@debian.org> Cc: jiaxun.yang <jiaxun.yang@flygoat.com>
2019-01-25MIPS: DTS: jz4740: Correct interrupt number of DMA corePaul Cercueil1-1/+1
The interrupt number set in the devicetree node of the DMA driver was wrong. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2018-09-11MIPS: JZ4740: DTS: Add DMA nodesPaul Cercueil1-0/+15
Add the devicetree nodes for the DMA core of the JZ4740 SoC, disabled by default, as currently there are no clients for the DMA driver (until the MMC driver and/or others get a devicetree node). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-09-11MIPS: JZ4770: DTS: Add DMA nodesPaul Cercueil1-0/+30
Add the two devicetree nodes for the two DMA cores of the JZ4770 SoC, disabled by default, as currently there are no clients for the DMA driver (until the MMC driver and/or others get a devicetree node). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-09-11MIPS: JZ4780: DTS: Update DMA node to match driver changesPaul Cercueil1-1/+2
The driver now accepts two memory resources, the first one for the channel-specific registers, the second one for the controller-specific registers. Note that older devicetrees, without this commit, will still work with the jz4780-dma driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>