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2019-09-03Merge tag 'imx-soc-5.4' of ↵Arnd Bergmann1-6/+0
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC changes for 5.4: - Drop AR8031 PHY TX delay adjusting from i.MX7D machine code, as it's superfluous due to the recent changes to Atheros AT803X driver. - Select TIMER_IMX_SYS_CTR for arm64 ARCH_MXC platform, since the system counter is needed as broadcast timer for cpuidle support. * tag 'imx-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: stop adjusting ar8031 phy tx delay arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms Link: https://lore.kernel.org/r/20190825153237.28829-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'aspeed-5.4-arch' of ↵Arnd Bergmann4-2/+82
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/soc ASPEED architecture updates for 5.4 This adds support for the new ASPEED AST2600 BMC SoC. * tag 'aspeed-5.4-arch' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: aspeed: Enable SMP boot ARM: aspeed: Add ASPEED AST2600 architecture ARM: aspeed: Select timer in each SoC dt-bindings: arm: cpus: Add ASPEED SMP Link: https://lore.kernel.org/r/CACPK8Xc1aSp5fXL3cEzC9SJsCXG2JwsSPpQrW3a09dkvhCyHHA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03Merge tag 'vexpress-update-5.4' of ↵Arnd Bergmann1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/soc ARMv7 Vexpress update for v5.4 Single cleanup patch handling type checks using cppcheck tool (bitwise shift by more than 31 on a 32 bit type) * tag 'vexpress-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: vexpress: Cleanup cppcheck shifting warning Link: https://lore.kernel.org/r/20190814172441.26143-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-25ARM: aspeed: Enable SMP bootJoel Stanley3-0/+67
This brings the secondary CPU into Linux. It depends on the setup performed by ASPEED's u-boot. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25ARM: aspeed: Add ASPEED AST2600 architectureJoel Stanley1-1/+13
The AST2600 is a Cortex A7 dual core CPU that uses the ARM GIC for interrupts and ARM timer as a clocksource. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25ARM: aspeed: Select timer in each SoCJoel Stanley1-1/+2
In preparation for adding the ast2600 which does not use this timer. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-24ARM: imx: stop adjusting ar8031 phy tx delayAndré Draszik1-6/+0
Recent changes to the Atheros at803x driver cause the approach taken here to stop working because commit 6d4cd041f0af ("net: phy: at803x: disable delay only for RGMII mode") and commit cd28d1d6e52e ("net: phy: at803x: Disable phy delay for RGMII mode") fix the AR8031 driver to configure the phy's (RX/TX) delays as per the 'phy-mode' in the device tree. In particular, the phy tx (and rx) delays are updated again as per the 'phy-mode' *after* the code in here runs. Things worked before above commits, because the AR8031 comes out of reset with RX delay enabled, and the at803x driver didn't touch the delay configuration at all when "rgmii" mode was selected. It appears the code in here tries to make device trees work that incorrectly specify "rgmii", but that can't work any more and it is imperative since above commits to have the phy-mode configured correctly in the device tree. I suspect there are a few imx7d based boards using the ar8031 phy and phy-mode = "rgmii", but given I don't know which ones exactly, I am not in a position to update the respective device trees. Hence this patch is simply removing the superfluous code from the imx7d initialisation. An alternative could be to add a warning instead, but that would penalize all boards that have been updated already. Signed-off-by: André Draszik <git@andred.net> CC: Russell King <linux@armlinux.org.uk> CC: Shawn Guo <shawnguo@kernel.org> CC: Sascha Hauer <s.hauer@pengutronix.de> CC: Pengutronix Kernel Team <kernel@pengutronix.de> CC: Fabio Estevam <festevam@gmail.com> CC: NXP Linux Team <linux-imx@nxp.com> CC: Kate Stewart <kstewart@linuxfoundation.org> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Thomas Gleixner <tglx@linutronix.de> CC: Leonard Crestez <leonard.crestez@nxp.com> CC: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-15Merge branch 'lpc32xx/multiplatform' into arm/socArnd Bergmann13-146/+84
I revisited some older patches here, getting two of the remaining ARM platforms to build with ARCH_MULTIPLATFORM like most others do. In case of lpc32xx, I created a new set of patches, which seemed easier than digging out what I did for an older release many years ago. * lpc32xx/multiplatform: ARM: lpc32xx: allow multiplatform build ARM: lpc32xx: clean up header files serial: lpc32xx: allow compile testing net: lpc-enet: allow compile testing net: lpc-enet: fix printk format strings net: lpc-enet: fix badzero.cocci warnings net: lpc-enet: move phy setup into platform code net: lpc-enet: factor out iram access gpio: lpc32xx: allow building on non-lpc32xx targets serial: lpc32xx_hs: allow compile-testing watchdog: pnx4008_wdt: allow compile-testing usb: udc: lpc32xx: allow compile-testing usb: ohci-nxp: enable compile-testing Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15ARM: lpc32xx: allow multiplatform buildArnd Bergmann4-63/+14
All preparation work is done, so the platform can finally be moved into ARCH_MULTIPLATFORM. This requires a small change to the defconfig file to enable the platform. Link: https://lore.kernel.org/r/20190809144043.476786-14-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15ARM: lpc32xx: clean up header filesArnd Bergmann8-66/+21
All device drivers have stopped relying on mach/*.h headers, so move the remaining headers into arch/arm/mach-lpc32xx/lpc32xx.h to prepare for multiplatform builds. The mach/entry-macro.S file has been unused for a long time now and can simply get removed. Link: https://lore.kernel.org/r/20190809144043.476786-13-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15serial: lpc32xx: allow compile testingArnd Bergmann1-0/+30
The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the one thing that relies on platform header files. Move that into the core platform code so we only need a variable declaration for it, and enable COMPILE_TEST building. Link: https://lore.kernel.org/r/20190809144043.476786-12-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: move phy setup into platform codeArnd Bergmann1-0/+12
Setting the phy mode requires touching a platform specific register, which prevents us from building the driver without its header files. Move it into a separate function in arch/arm/mach/lpc32xx to hide the core registers from the network driver. Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15net: lpc-enet: factor out iram accessArnd Bergmann3-18/+7
The lpc_eth driver uses a platform specific method to find the internal sram. This prevents building it on other machines. Rework to only use one function call and keep the other platform internals where they belong. Ideally this would look up the sram location from DT, but as this is a rarely used driver, I want to keep the modifications to a minimum. Link: https://lore.kernel.org/r/20190809144043.476786-7-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15gpio: lpc32xx: allow building on non-lpc32xx targetsArnd Bergmann1-0/+1
The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Link: https://lore.kernel.org/r/20190809144043.476786-6-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: orion/mvebu: unify debug-ll virtual addressesArnd Bergmann4-13/+10
In a multiplatform configuration, enabling DEBUG_LL breaks booting on all platforms with incompatible settings. In case of the Marvell platforms of the Orion/MVEBU family, the physical addresses are all the same, we just map them at different virtual addresses, which makes it impossible to run a kernel with DEBUG_LL enabled on a combination of the merged mvebu and the legacy boardfile based platforms. This is easily solved by using the same virtual address everywhere. I picked the address that is already used by mach-mvebu for UART0: 0xfec12000. All these platforms have a 1MB region with their internal registers, almost always at physical address 0xf1000000, so I'm updating the iotable for that entry. In case of mach-dove, this is slightly trickier, as the existing mapping is 8MB and a second 8MB mapping is already at the 0xfec00000 address. I have verified from the datasheet that the last 7MB of the physical mapping are "reserved" and nothing in Linux tries to use it either. I'm putting this 1MB mapping at the same address as the others, and the second 8MB register area immediately before that. Link: https://lore.kernel.org/r/20190731195713.3150463-14-arnd@arndb.de Link: https://lore.kernel.org/linux-arm-kernel/87si3eb1z8.fsf@free-electrons.com/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: dove: clean up mach/*.h headersArnd Bergmann12-44/+17
This is a simple move of all header files that are no longer included by anything else from the include/mach directory to the platform directory itself as preparation for multiplatform support. The mach/uncompress.h headers are left in place for now, and are mildly modified to be independent of the other headers. They will be removed entirely when ARCH_MULTIPLATFORM gets enabled and they become obsolete. Rather than updating the path names inside of the comments of each header, I delete those comments to avoid having to update them again, should they get moved or copied another time. Link: https://lore.kernel.org/r/20190731195713.3150463-13-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14Merge tag 'ux500-v5.4-1' of ↵Arnd Bergmann2-8/+2
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/soc This is a slew of Ux500 updates for the v5.4 kernel cycle: - Stop populating the PRCMU devices from the core CPU file, it works just fine at device_initcall() level. - Add a missing of_node_put() in the core file. - Simplify the debug UART code. - Add myself to MAINTAINERS * tag 'ux500-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: MAINTAINERS: add soc/ux500 ARM: ux500: simplify and move debug UART ARM: ux500: add missing of_node_put() ARM: ux500: Stop populating the PRCMU devices early Link: https://lore.kernel.org/r/CACRpkdbH-h5fRwuidcpeOp8mtRoKUW65SAk8a4A==BCDzn3QMA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: iop32x: merge everything into mach-iop32x/Arnd Bergmann28-125/+102
Various bits of iop32x are now in their traditional locations in plat-iop, mach-iop/include/mach/ and in include/asm/mach/hardware. As nothing outside of the iop32x mach code references these any more, this can all be moved into one place now. The only remaining things in the include/mach/ directory are now the NR_IRQS definition, the entry-macros.S file and the the decompressor uart access. After the irqchip code has been converted to SPARSE_IRQ and GENERIC_IRQ_MULTI_HANDLER, it can be moved to ARCH_MULTIPLATFORM. Link: https://lore.kernel.org/r/20190809163334.489360-7-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: iop32x: make mach/uncompress.h independent of mach/hardware.hArnd Bergmann1-16/+2
All supported uarts use the same address: IQ80321_UART and IQ31244_UART are both defined to the default value of 0xfe800000. By using that as the address unconditionally, all dependencies on other machine headers can be avoided. Link: https://lore.kernel.org/r/20190809163334.489360-6-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: xscale: fix multi-cpu compilationArnd Bergmann1-2/+4
Building a combined ARMv4+XScale kernel produces these and other build failures: /tmp/copypage-xscale-3aa821.s: Assembler messages: /tmp/copypage-xscale-3aa821.s:167: Error: selected processor does not support `pld [r7,#0]' in ARM mode /tmp/copypage-xscale-3aa821.s:168: Error: selected processor does not support `pld [r7,#32]' in ARM mode /tmp/copypage-xscale-3aa821.s:169: Error: selected processor does not support `pld [r1,#0]' in ARM mode /tmp/copypage-xscale-3aa821.s:170: Error: selected processor does not support `pld [r1,#32]' in ARM mode /tmp/copypage-xscale-3aa821.s:171: Error: selected processor does not support `pld [r7,#64]' in ARM mode /tmp/copypage-xscale-3aa821.s:176: Error: selected processor does not support `ldrd r4,r5,[r7],#8' in ARM mode /tmp/copypage-xscale-3aa821.s:180: Error: selected processor does not support `strd r4,r5,[r1],#8' in ARM mode Add an explict .arch armv5 in the inline assembly to allow the ARMv5 specific instructions regardless of the compiler -march= target. Link: https://lore.kernel.org/r/20190809163334.489360-5-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14dma: iop-adma: allow building without platform headersArnd Bergmann4-1033/+1
Now that iop3xx and iop13xx are gone, the iop-adma driver no longer needs to deal with incompatible register layout defined in machine specific header files. Move the iop32x specific definitions into drivers/dma/iop-adma.h and the platform_data into include/linux/platform_data/dma-iop32x.h, and change the machine code to no longer reference those. The DMA0_ID/DMA1_ID/AAU_ID macros are required as part of the platform data interface and still need to be visible, so move those from one header to the other. Link: https://lore.kernel.org/r/20190809163334.489360-4-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: remove Intel iop33x and iop13xx supportArnd Bergmann47-5407/+6
There are three families of IOP machines we support in Linux: iop32x (which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x). All products we support in the kernel are based on the first of these, iop32x, the other families only ever supported the Intel reference boards but no actual machine anyone could ever buy. While one could clearly make them all three work in a single kernel with some work, this takes the easy way out, removing the later two platforms entirely, under the assumption that there are no remaining users. Earlier versions of OpenWRT and Debian both had support for iop32x but not the others, and they both dropped iop32x as well in their 2015 releases. Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: remove w90x900 platformArnd Bergmann42-3298/+0
This removes the old Winbond w90x900 platform, also known as Nuvoton NUC900. Wan Zongshun originally contributed the port and maintained it since then. From all I can tell, this platform is no longer being used with modern kernels, based on various indications: - The supported chips (nuc910/950/960) are no longer marketed by the manufacturer - Newer chips from the same family (nuc97x, nuc980, n329x) that are still marketed have Linux BSPs but those were never submitted for upstream inclusion. - The last patch from the platform maintainer was in 2011. - All patches to w90x900 platform specific files afterwards are cleanups that were apparently done without access to test hardware. - Both the website and the email address listed in the MAINTAINERS have become unreachable. Link: https://lore.kernel.org/r/20190809202749.742267-17-arnd@arndb.de Cc: "Wanzongshun (Vincent)" <wanzongshun@huawei.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14ARM: remove ks8695 platformArnd Bergmann40-2940/+1
ks8695 is an older SoC originally made by Kendin, which was later acquired by Micrel, and subsequently by Microchip. The platform port was originally contributed by Andrew Victor and Ben Dooks, and later maintained by Greg Ungerer. When I recently submitted cleanups, but Greg noted that the platform no longer boots and nobody is using it any more, we decided to remove it. Link: https://lore.kernel.org/r/20190809202749.742267-2-arnd@arndb.de Cc: Andrew Victor <linux@maxim.org.za> Acked-by: Ben Dooks <ben-linux@fluff.org> Link: https://wikidevi.com/wiki/Micrel Link: https://lore.kernel.org/linux-arm-kernel/2bc41895-d4f9-896c-0726-0b2862fcbf25@kernel.org/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Ungerer <gerg@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13ARM: mach-nspire: Kill off CLCD auxdataLinus Walleij4-150/+0
After transitioning the CLCD to use DRM we can now kill off the final piece of auxdata on the NSPIRE. Link: https://lore.kernel.org/r/20190810075023.7327-1-linus.walleij@linaro.org Cc: Daniel Tang <dt.tangr@gmail.com> Cc: Fabian Vogt <fabian@ritter-vogt.de> Tested-by: Fabian Vogt <fabian@ritter-vogt.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-10Merge tag 'Wimplicit-fallthrough-5.3-rc4' of ↵Linus Torvalds6-11/+16
git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux Pull fall-through fixes from Gustavo A. R. Silva: "Mark more switch cases where we are expecting to fall through, fixing fall-through warnings in arm, sparc64, mips, i386 and s390" * tag 'Wimplicit-fallthrough-5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux: ARM: ep93xx: Mark expected switch fall-through scsi: fas216: Mark expected switch fall-throughs pcmcia: db1xxx_ss: Mark expected switch fall-throughs video: fbdev: omapfb_main: Mark expected switch fall-throughs watchdog: riowd: Mark expected switch fall-through s390/net: Mark expected switch fall-throughs crypto: ux500/crypt: Mark expected switch fall-throughs watchdog: wdt977: Mark expected switch fall-through watchdog: scx200_wdt: Mark expected switch fall-through watchdog: Mark expected switch fall-throughs ARM: signal: Mark expected switch fall-through mfd: omap-usb-host: Mark expected switch fall-throughs mfd: db8500-prcmu: Mark expected switch fall-throughs ARM: OMAP: dma: Mark expected switch fall-throughs ARM: alignment: Mark expected switch fall-throughs ARM: tegra: Mark expected switch fall-through ARM/hw_breakpoint: Mark expected switch fall-throughs
2019-08-09ARM: ep93xx: Mark expected switch fall-throughGustavo A. R. Silva1-0/+1
Mark switch cases where we are expecting to fall through. Fix the following warnings (Building: arm-ep93xx_defconfig arm): arch/arm/mach-ep93xx/crunch.c: In function 'crunch_do': arch/arm/mach-ep93xx/crunch.c:46:3: warning: this statement may fall through [-Wimplicit-fallthrough=] memset(crunch_state, 0, sizeof(*crunch_state)); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/mach-ep93xx/crunch.c:53:2: note: here case THREAD_NOTIFY_EXIT: ^~~~ Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09ARM: signal: Mark expected switch fall-throughGustavo A. R. Silva1-0/+1
Mark switch cases where we are expecting to fall through. This patch fixes the following warning: arch/arm/kernel/signal.c: In function 'do_signal': arch/arm/kernel/signal.c:598:12: warning: this statement may fall through [-Wimplicit-fallthrough=] restart -= 2; ~~~~~~~~^~~~ arch/arm/kernel/signal.c:599:3: note: here case -ERESTARTNOHAND: ^~~~ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09ARM: OMAP: dma: Mark expected switch fall-throughsGustavo A. R. Silva1-9/+5
Mark switch cases where we are expecting to fall through. This patch fixes the following warnings: arch/arm/plat-omap/dma.c: In function 'omap_set_dma_src_burst_mode': arch/arm/plat-omap/dma.c:384:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (dma_omap2plus()) { ^ arch/arm/plat-omap/dma.c:393:2: note: here case OMAP_DMA_DATA_BURST_16: ^~~~ arch/arm/plat-omap/dma.c:394:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (dma_omap2plus()) { ^ arch/arm/plat-omap/dma.c:402:2: note: here default: ^~~~~~~ arch/arm/plat-omap/dma.c: In function 'omap_set_dma_dest_burst_mode': arch/arm/plat-omap/dma.c:473:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (dma_omap2plus()) { ^ arch/arm/plat-omap/dma.c:481:2: note: here default: ^~~~~~~ Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09ARM: alignment: Mark expected switch fall-throughsGustavo A. R. Silva1-1/+3
Mark switch cases where we are expecting to fall through. This patch fixes the following warnings: arch/arm/mm/alignment.c: In function 'thumb2arm': arch/arm/mm/alignment.c:688:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if ((tinstr & (3 << 9)) == 0x0400) { ^ arch/arm/mm/alignment.c:700:2: note: here default: ^~~~~~~ arch/arm/mm/alignment.c: In function 'do_alignment_t32_to_handler': arch/arm/mm/alignment.c:753:15: warning: this statement may fall through [-Wimplicit-fallthrough=] poffset->un = (tinst2 & 0xff) << 2; ~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~ arch/arm/mm/alignment.c:754:2: note: here case 0xe940: ^~~~ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09ARM: tegra: Mark expected switch fall-throughGustavo A. R. Silva1-1/+1
Mark switch cases where we are expecting to fall through. This patch fixes the following warning: arch/arm/mach-tegra/reset.c: In function 'tegra_cpu_reset_handler_enable': arch/arm/mach-tegra/reset.c:72:3: warning: this statement may fall through [-Wimplicit-fallthrough=] tegra_cpu_reset_handler_set(reset_address); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/mach-tegra/reset.c:74:2: note: here case 0: ^~~~ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09ARM/hw_breakpoint: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+5
Mark switch cases where we are expecting to fall through. This patch fixes the following warnings: arch/arm/kernel/hw_breakpoint.c: In function 'hw_breakpoint_arch_parse': arch/arm/kernel/hw_breakpoint.c:609:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) ^ arch/arm/kernel/hw_breakpoint.c:611:2: note: here case 3: ^~~~ arch/arm/kernel/hw_breakpoint.c:613:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) ^ arch/arm/kernel/hw_breakpoint.c:615:2: note: here default: ^~~~~~~ arch/arm/kernel/hw_breakpoint.c: In function 'arch_build_bp_info': arch/arm/kernel/hw_breakpoint.c:544:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE) ^ arch/arm/kernel/hw_breakpoint.c:547:2: note: here default: ^~~~~~~ In file included from include/linux/kernel.h:11, from include/linux/list.h:9, from include/linux/preempt.h:11, from include/linux/hardirq.h:5, from arch/arm/kernel/hw_breakpoint.c:16: arch/arm/kernel/hw_breakpoint.c: In function 'hw_breakpoint_pending': include/linux/compiler.h:78:22: warning: this statement may fall through [-Wimplicit-fallthrough=] # define unlikely(x) __builtin_expect(!!(x), 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~ include/asm-generic/bug.h:136:2: note: in expansion of macro 'unlikely' unlikely(__ret_warn_on); \ ^~~~~~~~ arch/arm/kernel/hw_breakpoint.c:863:3: note: in expansion of macro 'WARN' WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); ^~~~ arch/arm/kernel/hw_breakpoint.c:864:2: note: here case ARM_ENTRY_SYNC_WATCHPOINT: ^~~~ arch/arm/kernel/hw_breakpoint.c: In function 'core_has_os_save_restore': arch/arm/kernel/hw_breakpoint.c:910:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (oslsr & ARM_OSLSR_OSLM0) ^ arch/arm/kernel/hw_breakpoint.c:912:2: note: here default: ^~~~~~~ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-09Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-8/+15
Pull kvm fixes from Paolo Bonzini: "Bugfixes (arm and x86) and cleanups" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: selftests: kvm: Adding config fragments KVM: selftests: Update gitignore file for latest changes kvm: remove unnecessary PageReserved check KVM: arm/arm64: vgic: Reevaluate level sensitive interrupts on enable KVM: arm: Don't write junk to CP15 registers on reset KVM: arm64: Don't write junk to sysregs on reset KVM: arm/arm64: Sync ICH_VMCR_EL2 back when about to block x86: kvm: remove useless calls to kvm_para_available KVM: no need to check return value of debugfs_create functions KVM: remove kvm_arch_has_vcpu_debugfs() KVM: Fix leak vCPU's VMCS value into other pCPU KVM: Check preempted_in_kernel for involuntary preemption KVM: LAPIC: Don't need to wakeup vCPU twice afer timer fire arm64: KVM: hyp: debug-sr: Mark expected switch fall-through KVM: arm64: Update kvm_arm_exception_class and esr_class_str for new EC KVM: arm: vgic-v3: Mark expected switch fall-through arm64: KVM: regmap: Fix unexpected switch fall-through KVM: arm/arm64: Introduce kvm_pmu_vcpu_init() to setup PMU counter index
2019-08-09KVM: arm: Don't write junk to CP15 registers on resetMarc Zyngier1-8/+15
At the moment, the way we reset CP15 registers is mildly insane: We write junk to them, call the reset functions, and then check that we have something else in them. The "fun" thing is that this can happen while the guest is running (PSCI, for example). If anything in KVM has to evaluate the state of a CP15 register while junk is in there, bad thing may happen. Let's stop doing that. Instead, we track that we have called a reset function for that register, and assume that the reset function has done something. In the end, the very need of this reset check is pretty dubious, as it doesn't check everything (a lot of the CP15 reg leave outside of the cp15_regs[] array). It may well be axed in the near future. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-02Merge tag 'arm-swiotlb-5.3' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds4-1/+74
Pull arm swiotlb support from Christoph Hellwig: "This fixes a cascade of regressions that originally started with the addition of the ia64 port, but only got fatal once we removed most uses of block layer bounce buffering in Linux 4.18. The reason is that while the original i386/PAE code that was the first architecture that supported > 4GB of memory without an iommu decided to leave bounce buffering to the subsystems, which in those days just mean block and networking as no one else consumed arbitrary userspace memory. Later with ia64, x86_64 and other ports we assumed that either an iommu or something that fakes it up ("software IOTLB" in beautiful Intel speak) is present and that subsystems can rely on that for dealing with addressing limitations in devices. Except that the ARM LPAE scheme that added larger physical address to 32-bit ARM did not follow that scheme and thus only worked by chance and only for block and networking I/O directly to highmem. Long story, short fix - add swiotlb support to arm when build for LPAE platforms, which actuallys turns out to be pretty trivial with the modern dma-direct / swiotlb code to fix the Linux 4.18-ish regression" * tag 'arm-swiotlb-5.3' of git://git.infradead.org/users/hch/dma-mapping: arm: use swiotlb for bounce buffering on LPAE configs dma-mapping: check pfn validity in dma_common_{mmap,get_sgtable}
2019-07-31ARM: vexpress: Cleanup cppcheck shifting warningPhong Tran1-2/+2
Fix below warning from cppcheck tool using BIT() macro: "Shifting signed 32-bit value by 31 bits is undefined behaviour errors" Signed-off-by: Phong Tran <tranmanphong@gmail.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-07-24arm: use swiotlb for bounce buffering on LPAE configsChristoph Hellwig4-1/+74
The DMA API requires that 32-bit DMA masks are always supported, but on arm LPAE configs they do not currently work when memory is present above 4GB. Wire up the swiotlb code like for all other architectures to provide the bounce buffering in that case. Fixes: 21e07dba9fb11 ("scsi: reduce use of block bounce buffers"). Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-07-23Merge tag 'imx-fixes-5.3' of ↵Olof Johansson6-7/+7
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.3: - Fix i.MX8MM SAI3 RXC/TXFS pinmux configuration. - Fix i.MX7ULP usb-phy unit address to drop extra '0x' notation. - Fix typo of clock frequency property name in a few i.MX6UL board I2C buses. - Drop "fsl,imx6sx-sai" from i.MX8M SAI device, as it's not compatible with i.MX6SX SAI. * tag 'imx-fixes-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mq: fix SAI compatible arm64: dts: imx8mm: Correct SAI3 RXC/TXFS pin's mux option #1 ARM: dts: imx6ul: fix clock frequency property name of I2C buses ARM: dts: imx7ulp: Fix usb-phy unit address format Link: https://lore.kernel.org/r/20190723090827.GU15632@dragon Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-23ARM: defconfig: u8500: Add new driversLinus Walleij1-1/+11
This enables the new or updates driver options for U8500 that got merged into v5.3-rc1: - CMA, MCDE driver, LIMA driver and the Samsung S6D16D0 driver enabled by default bringing up the new graphics support. Include the LOGO so we can see when the graphics are live. - We use the IIO hwmon bridge for reflecting temperature in the system. - Set MUSB to PIO mode as this is the one working most stable for the time being. - HWSPINLOCK needs to be set to get the hardware semaphore driver to compile and link properly. Link: https://lore.kernel.org/r/20190723081523.13079-2-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-23ARM: defconfig: u8500: Refresh defconfigLinus Walleij1-14/+8
This refreshes the outdated U8500 defconfig: some options moved around, PS/2 mouse is no longer default on, crypto options moved around etc. Link: https://lore.kernel.org/r/20190723081523.13079-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-23ARM: dts: bcm: bcm47094: add missing #cells for mdio-bus-muxArnd Bergmann1-0/+3
The mdio-bus-mux has no #address-cells/#size-cells property, which causes a few dtc warnings: arch/arm/boot/dts/bcm47094-linksys-panamera.dts:129.4-18: Warning (reg_format): /mdio-bus-mux/mdio@200:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm47094-linksys-panamera.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-linksys-panamera.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-linksys-panamera.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-linksys-panamera.dts:128.22-132.5: Warning (avoid_default_addr_size): /mdio-bus-mux/mdio@200: Relying on default #address-cells value arch/arm/boot/dts/bcm47094-linksys-panamera.dts:128.22-132.5: Warning (avoid_default_addr_size): /mdio-bus-mux/mdio@200: Relying on default #size-cells value Add the normal cell numbers. Link: https://lore.kernel.org/r/20190722145618.1155492-1-arnd@arndb.de Fixes: 2bebdfcdcd0f ("ARM: dts: BCM5301X: Add support for Linksys EA9500") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-23ARM: davinci: fix sleep.S build error on ARMv4Arnd Bergmann1-0/+1
When building a multiplatform kernel that includes armv4 support, the default target CPU does not support the blx instruction, which leads to a build failure: arch/arm/mach-davinci/sleep.S: Assembler messages: arch/arm/mach-davinci/sleep.S:56: Error: selected processor does not support `blx ip' in ARM mode Add a .arch statement in the sources to make this file build. Link: https://lore.kernel.org/r/20190722145211.1154785-1-arnd@arndb.de Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-23ARM: ux500: simplify and move debug UARTLinus Walleij1-7/+2
The debug UART code defined three different virtual addresses while only one is ever used. Get rid of this, and move the UART remapping to 0xfffe8000 where DTCM reside on some platforms but not on Ux500, so it can be reused moving the UART out of the vmalloc area. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-23ARM: ux500: Stop populating the PRCMU devices earlyLinus Walleij1-1/+0
The PRCMU devices are getting populated from the MFD driver and that is enough for them to come up. We already have an early quirk for the things that need to happen really early and the PRCMU timer that need to be registered really early will find its own node just fine as the timer/clocksource subsystem looks through the whole device tree for compatible nodes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-22ARM: dts: imx6ul: fix clock frequency property name of I2C busesSébastien Szymanski5-6/+6
A few boards set clock frequency of their I2C buses with "clock_frequency" property. The right property is "clock-frequency". Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-07-21ARM: Delete netx a second timeLinus Walleij20-1860/+0
Commit ceb02dcf676f ARM: delete netx machine deleted the mach-netx machine. Then eight days later it was resurrected by SPDX tag fixes. I think. Taking the liberty to fix some additional debug uart cruft. Link: https://lore.kernel.org/r/20190721224157.6597-1-linus.walleij@linaro.org Fixes: ceb02dcf676f ("ARM: delete netx machine") Acked-By: Robert Schwebel <r.schwebel@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-07-22ARM: dts: imx7ulp: Fix usb-phy unit address formatFabio Estevam1-1/+1
The following warning is seen when building with W=1: arch/arm/boot/dts/imx7ulp.dtsi:189.31-195.5: Warning (simple_bus_reg): /bus@40000000/usb-phy@0x40350000: simple-bus unit address format error, expected "40350000" Fix it as suggested by removing the extra "0x" notation. Fixes: 5b7bd456318a ("ARM: dts: imx7ulp: add imx7ulp USBOTG1 support") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-07-20Merge tag 'kbuild-v5.3-2' of ↵Linus Torvalds1-2/+1
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: - match the directory structure of the linux-libc-dev package to that of Debian-based distributions - fix incorrect include/config/auto.conf generation when Kconfig creates it along with the .config file - remove misleading $(AS) from documents - clean up precious tag files by distclean instead of mrproper - add a new coccinelle patch for devm_platform_ioremap_resource migration - refactor module-related scripts to read modules.order instead of $(MODVERDIR)/*.mod files to get the list of created modules - remove MODVERDIR - update list of header compile-test - add -fcf-protection=none flag to avoid conflict with the retpoline flags when CONFIG_RETPOLINE=y - misc cleanups * tag 'kbuild-v5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (25 commits) kbuild: add -fcf-protection=none when using retpoline flags kbuild: update compile-test header list for v5.3-rc1 kbuild: split out *.mod out of {single,multi}-used-m rules kbuild: remove 'prepare1' target kbuild: remove the first line of *.mod files kbuild: create *.mod with full directory path and remove MODVERDIR kbuild: export_report: read modules.order instead of .tmp_versions/*.mod kbuild: modpost: read modules.order instead of $(MODVERDIR)/*.mod kbuild: modsign: read modules.order instead of $(MODVERDIR)/*.mod kbuild: modinst: read modules.order instead of $(MODVERDIR)/*.mod scsi: remove pointless $(MODVERDIR)/$(obj)/53c700.ver kbuild: remove duplication from modules.order in sub-directories kbuild: get rid of kernel/ prefix from in-tree modules.{order,builtin} kbuild: do not create empty modules.order in the prepare stage coccinelle: api: add devm_platform_ioremap_resource script kbuild: compile-test headers listed in header-test-m as well kbuild: remove unused hostcc-option kbuild: remove tag files by distclean instead of mrproper kbuild: add --hash-style= and --build-id unconditionally kbuild: get rid of misleading $(AS) from documents ...
2019-07-19Merge tag 'armsoc-defconfig' of ↵Linus Torvalds82-196/+106
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC defconfig updates from Olof Johansson: "We keep this in a separate branch to avoid cross-branch conflicts, but most of the material here is fairly boring -- some new drivers turned on for hardware since they were merged, and some refreshed files due to time having moved a lot of entries around" * tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) ARM: configs: multi_v5: Remove duplicate ASPEED options arm64: defconfig: Enable CONFIG_KEYBOARD_SNVS_PWRKEY as module ARM: imx_v6_v7_defconfig: Enable CONFIG_ARM_IMX_CPUFREQ_DT defconfig: arm64: enable i.MX8 SCU octop driver arm64: defconfig: Add i.MX SCU SoC info driver arm64: defconfig: Enable CONFIG_QORIQ_THERMAL ARM: imx_v6_v7_defconfig: Select CONFIG_NVMEM_SNVS_LPGPR arm64: defconfig: ARM_IMX_CPUFREQ_DT=m ARM: imx_v6_v7_defconfig: Add TPM PWM support by default ARM: imx_v6_v7_defconfig: Enable the OV2680 camera driver ARM: imx_v6_v7_defconfig: Enable CONFIG_THERMAL_STATISTICS arm64: defconfig: NVMEM_IMX_OCOTP=y for imx8m ARM: multi_v7_defconfig: enable STMFX pinctrl support arm64 defconfig: enable LVM support ARM: configs: multi_v5: Add more ASPEED devices arm64: defconfig: Add Tegra194 PCIe driver ARM: configs: aspeed: Add new drivers ARM: exynos_defconfig: Enable Panfrost and Lima drivers ARM: multi_v7_defconfig: Enable Panfrost and Lima drivers arm64 defconfig: enable Mellanox cards ...
2019-07-19Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds257-1229/+10848
Pull ARM Devicetree updates from Olof Johansson: "We continue to see a lot of new material. I've highlighted some of it below, but there's been more beyond that as well. One of the sweeping changes is that many boards have seen their ARM Mali GPU devices added to device trees, since the DRM drivers have now been merged. So, with the caveat that I have surely missed several great contributions, here's a collection of the material this time around: New SoCs: - Mediatek mt8183 (4x Cortex-A73 + 4x Cortex-A53) - TI J721E (2x Cortex-A72 + 3x Cortex-R5F + 3 DSPs + MMA) - Amlogic G12B (4x Cortex-A73 + 2x Cortex-A53) New Boards / platforms: - Aspeed BMC support for a number of new server platforms - Kontron SMARC SoM (several i.MX6 versions) - Novtech's Meerkat96 (i.MX7) - ST Micro Avenger96 board - Hardkernel ODROID-N2 (Amlogic G12B) - Purism Librem5 devkit (i.MX8MQ) - Google Cheza (Qualcomm SDM845) - Qualcomm Dragonboard 845c (Qualcomm SDM845) - Hugsun X99 TV Box (Rockchip RK3399) - Khadas Edge/Edge-V/Captain (Rockchip RK3399) Updated / expanded boards and platforms: - Renesas r7s9210 has a lot of new peripherals added - Fixes and polish for Rockchip-based Chromebooks - Amlogic G12A has a lot of peripherals added - Nvidia Jetson Nano sees various fixes and improvements, and is now at feature parity with TX1" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (586 commits) ARM: dts: gemini: Set DIR-685 SPI CS as active low ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family ARM: dts: exynos: Move Mali400 GPU node to "/soc" ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210 arm64: dts: qcom: qcs404: Add missing space for cooling-cells property arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphire arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs arm64: dts: rockchip: enable rk3328 watchdog clock ARM: dts: rockchip: add display nodes for rk322x ARM: dts: rockchip: fix vop iommu-cells on rk322x arm64: dts: rockchip: Add support for Hugsun X99 TV Box arm64: dts: rockchip: Define values for the IPA governor for rock960 arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsi arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance. Revert "ARM: dts: rockchip: set PWM delay backlight settings for Minnie" ARM: dts: rockchip: Configure BT_DEV_WAKE in on rk3288-veyron arm64: dts: qcom: sdm845-cheza: add initial cheza dt ARM: dts: msm8974-FP2: Add vibration motor ...
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