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2012-09-22arm: mvebu: use GPIO support now that a driver is availableThomas Petazzoni2-0/+2
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platformsThomas Petazzoni1-0/+2
This patch actually enables pinctrl drivers for Armada 370 and XP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22arm: mvebu: split Kconfig options for Armada 370 and XPThomas Petazzoni1-3/+13
Until now, all the code for Armada 370 and XP was common, so we had a single Kconfig option to support all boards using both SoCs. With the addition of pinctrl drivers, this situation has changed: those two SoCs are radically different in terms of pinctrl, so they have two separate drivers. Since pinctrl drivers are typically select-ed from the SoC Kconfig option, it makes sense to split the 370/XP option into two separate options: one for Armada 370 and another for Armada XP. We keep an hidden option selected by both ARMADA_370 and ARMADA_XP in order to easily compile common code. A followup patch actually makes use of this split to select the appropriate pinctrl drivers. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22ARM: mvebu: adjust Armada XP evaluation board DTSThomas Petazzoni1-2/+2
The Armada XP evaluation board is based on the MV78460 Armava XP SoC. Now that we have separate .dtsi files for the three different SoCs of the Armada XP family, use the appropriate one as include for the Armada XP evaluation board .dts file. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22ARM: mvebu: Add pinctrl support to Armada 370 SoCThomas Petazzoni1-0/+5
This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada 370 SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22ARM: mvebu: Add pinctrl support to Armada XP SoCsThomas Petazzoni3-0/+84
This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22pinctrl: mvebu: pinctrl driver coreSebastian Hesselbarth1-0/+1
This patch adds a pinctrl driver core for Marvell SoCs plus DT binding documentation. This core driver will be used by SoC family specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/Kconfig
2012-09-21arm: mvebu: add address decoding controller to the DTThomas Petazzoni1-0/+5
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mvebu: add basic address decoding support to Armada 370/XPThomas Petazzoni2-1/+135
This commit adds basic support for address decoding configuration for the Armada 370 and Armada XP SoCs, re-using the infrastructure provided in plat-orion. For now, only a BootROM window is configured on Armada XP, which is needed to get the non-boot CPUs started and is therefore a requirement for SMP support. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: make bridge_virt_base non-const to support DT use caseThomas Petazzoni1-1/+1
For the Armada 370 and XP SoCs where the DT is used, we need to fill at runtime the bridge_virt_base field on the orion_addr_map_cfg. Therefore, remove the 'const' qualifier on this field. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config optionThomas Petazzoni2-9/+13
Until now, the PLAT_ORION configuration option was common to all the Marvell EBU SoCs, and selecting this option had the effect of enabling the MPP code, GPIO code, address decoding and PCIe code from plat-orion, as well as providing access to driver-specific header files from plat-orion/include. However, the Armada 370 and XP SoCs will not use the MPP and GPIO code (instead some proper pinctrl and gpio drivers are in preparation), and generally, we want to move away from plat-orion and instead have everything in mach-mvebu. That said, in the mean time, we want to leverage the driver-specific headers as well as the address decoding code, so we introduce PLAT_ORION_LEGACY. The older Marvell SoCs need to select PLAT_ORION_LEGACY, while the newer Marvell SoCs need to select PLAT_ORION. Of course, when PLAT_ORION_LEGACY is selected, it automatically selects PLAT_ORION. Then, with just PLAT_ORION, you have the address decoding code plus the driver-specific headers. If you add PLAT_ORION_LEGACY to this, you gain the old MPP, GPIO and PCIe code. Again, this is only a temporary solution until we make all Marvell EBU platforms converge into the mach-mvebu directory. This solution avoids duplicating the existing address decoding code into mach-mvebu. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: use void __iomem pointers for addr-map functionsThomas Petazzoni6-16/+15
The functions for address mapping management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: use void __iomem pointers for time functionsThomas Petazzoni6-18/+14
The functions for time management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: use void __iomem pointers for MPP functionsThomas Petazzoni6-12/+8
The registration function for MPP now takes void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/mpp.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: plat-orion: use void __iomem pointers for UART registration functionsThomas Petazzoni6-34/+22
The registration functions for UARTs now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-mvebu: use IOMEM() for base address definitionsThomas Petazzoni2-2/+2
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-mvebu code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-orion5x: use IOMEM() for base address definitionsThomas Petazzoni7-19/+24
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-orion5x code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-mv78xx0: use IOMEM() for base address definitionsThomas Petazzoni6-24/+31
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-mv78xx0 code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-kirkwood: use IOMEM() for base address definitionsThomas Petazzoni7-27/+31
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-kirkwood code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-dove: use IOMEM() for base address definitionsThomas Petazzoni6-26/+32
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-dove code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-orion5x: use plus instead of or for address definitionsThomas Petazzoni3-37/+37
Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-mv78xx0: use plus instead of or for address definitionsThomas Petazzoni2-47/+47
Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-kirkwood: use plus instead of or for address definitionsThomas Petazzoni2-65/+65
Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21arm: mach-dove: use plus instead of or for address definitionsThomas Petazzoni2-67/+67
Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-08Merge branch 'fixes-for-3.6' of ↵Linus Torvalds4-11/+119
git://git.linaro.org/people/mszyprowski/linux-dma-mapping Pull DMA-mapping fixes from Marek Szyprowski: "Another set of fixes for ARM dma-mapping subsystem. Commit e9da6e9905e6 replaced custom consistent buffer remapping code with generic vmalloc areas. It however introduced some regressions caused by limited support for allocations in atomic context. This series contains fixes for those regressions. For some subplatforms the default, pre-allocated pool for atomic allocations turned out to be too small, so a function for setting its size has been added. Another set of patches adds support for atomic allocations to IOMMU-aware DMA-mapping implementation. The last part of this pull request contains two fixes for Contiguous Memory Allocator, which relax too strict requirements." * 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping: ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMIC ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages() ARM: dma-mapping: Refactor out to introduce __in_atomic_pool ARM: dma-mapping: atomic_pool with struct page **pages ARM: Kirkwood: increase atomic coherent pool size ARM: DMA-Mapping: print warning when atomic coherent allocation fails ARM: DMA-Mapping: add function for setting coherent pool size from platform code ARM: relax conditions required for enabling Contiguous Memory Allocator mm: cma: fix alignment requirements for contiguous regions
2012-09-04ARM: gemini: fix the gemini buildLinus Walleij1-0/+1
Test-compiling obscure machines I notice that the gemini (which by the way lacks a defconfig) is broken since some time back. Adding a simple missing include makes it build again. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-04Merge branch 'fixes' of ↵Olof Johansson3-3/+4
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Two regression fixes and one boot-loader compatibility fix from Simon Horman. * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: armadillo800eva: enable rw rootfs mount ARM: shmobile: mackerel: fixup usb module order ARM: shmobile: armadillo800eva: fixup: sound card detection order
2012-09-03ARM: shmobile: armadillo800eva: enable rw rootfs mountKuninori Morimoto1-1/+1
armadillo800eva default boot loader is "hermit", and it's tag->u.core.flags has flag when kernel boots. Because of this, ${LINUX}/arch/arm/kernel/setup.c :: parse_tag_core() didn't remove MS_RDONLY flag from root_mountflags. Thus, the rootfs is mounted as "readonly". This patch adds "rw" kernel parameter, and enable read/write mounts for rootfs Cc: Masahiro Nakai <nakai@atmark-techno.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-09-02Merge branch 'fixes' of ↵Olof Johansson1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: marzen: fixup smsc911x id for regulator
2012-09-02Merge branch 'fixes-for-v3.6-v2' of ↵Olof Johansson1-0/+1
git://git.infradead.org/users/jcooper/linux into fixes * 'fixes-for-v3.6-v2' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: Fix 'SZ_1M' undeclared here for db88f6281-bp-setup.c
2012-08-31ARM: Kirkwood: Fix 'SZ_1M' undeclared here for db88f6281-bp-setup.cAndrew Lunn1-0/+1
Linux-next has failed to compile for kirkwood since 23 August with: arch/arm/mach-kirkwood/db88f6281-bp-setup.c:29: error: 'SZ_1M' undeclared here (not in a function) arch/arm/mach-kirkwood/db88f6281-bp-setup.c:33: error: 'SZ_4M' undeclared here (not in a function) Add missing <linux/sizes.h> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-08-31ARM: shmobile: mackerel: fixup usb module orderKuninori Morimoto1-1/+2
renesas_usbhs driver can play role as both Host and Gadget. In case of Gadget, it requires not only renesas_usbhs but also usb gadget module (like g_ether). So, renesas_usbhs driver calls usb_add_gadget_udc() on probe time. Because of this behavior, Host port plays also Gadget role if kernel has both Host/Gadget support. In mackerel case, from 0ada2da51800a4914887a9bcf22d563be80e50be (ARM: mach-shmobile: mackerel: use renesas_usbhs instead of r8a66597_hcd) usb0 plays Gadget role, and usb1 plays Host role, and current mackerel board probes as usb1 -> usb0. Thus, 1st installed usb gadget module (like g_ether) will be assigned to usb1 (= usb Host port), and 2nd module to usb0 (= usb Gadget port). It is very confusable for user. This patch fixup usb modes probing order as usb0 -> usb1. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-08-31ARM: shmobile: armadillo800eva: fixup: sound card detection orderKuninori Morimoto1-1/+1
Since armadillo800eva has 2 sound cards, and had reversed deferred probe order issue, it was purposely registered in reverse order. But it was solved by 1d29cfa57471a5e4b8a7c2a7433eeba170d3ad92 (driver core: fixup reversed deferred probe order) armadillo800eva board is expecting that FSI-WM8978 is the 1st, and FSI-HDMI is the 2nd sound card. This patch fixes it up Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-08-30ARM: shmobile: marzen: fixup smsc911x id for regulatorKuninori Morimoto1-1/+1
dummy_supplies for smsc911x are registered as "smsc911x". smsc911x driver needs id = -1 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-08-28ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMICHiroshi Doyu1-0/+36
Make use of the same atomic pool as DMA does, and skip a kernel page mapping which can involve sleep'able operations at allocating a kernel page table. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages()Hiroshi Doyu1-0/+12
Support atomic allocation in __iommu_get_pages(). Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [moved __atomic_get_pages() under #ifdef CONFIG_ARM_DMA_USE_IOMMU to avoid unused fuction warning for no-IOMMU case] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: dma-mapping: Refactor out to introduce __in_atomic_poolHiroshi Doyu1-6/+20
Check the given range("start", "size") is included in "atomic_pool" or not. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: dma-mapping: atomic_pool with struct page **pagesHiroshi Doyu1-3/+14
struct page **pages is necessary to align with non atomic path in __iommu_get_pages(). atomic_pool() has the intialized **pages instead of just *page. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: Kirkwood: increase atomic coherent pool sizeMarek Szyprowski1-0/+7
The default 256 KiB coherent pool may be too small for some of the Kirkwood devices, so increase it to make sure that devices will be able to allocate their buffers with GFP_ATOMIC flag. Suggested-by: Josh Coombs <josh.coombs@gmail.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
2012-08-28ARM: DMA-Mapping: print warning when atomic coherent allocation failsMarek Szyprowski1-0/+4
Print a loud warning when system runs out of memory from atomic DMA coherent pool to let users notice the potential problem. Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: DMA-Mapping: add function for setting coherent pool size from platform codeMarek Szyprowski2-1/+25
Some platforms might require to increase atomic coherent pool to make sure that their device will be able to allocate all their buffers from atomic context. This function can be also used to decrease atomic coherent pool size if coherent allocations are not used for the given sub-platform. Suggested-by: Josh Coombs <josh.coombs@gmail.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-08-28ARM: relax conditions required for enabling Contiguous Memory AllocatorMarek Szyprowski1-1/+1
Contiguous Memory Allocator requires only paging and MMU enabled not particular CPU architectures, so there is no need for strict dependency on CPU type. This enables to use CMA on some older ARM v5 systems which also might need large contiguous blocks for the multimedia processing hw modules. Reported-by: Prabhakar Lad <prabhakar.lad@ti.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Prabhakar Lad <prabhakar.lad@ti.com>
2012-08-27Merge branch 'armadillo800eva' of ↵Olof Johansson1-5/+6
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes * 'armadillo800eva' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: mach-shmobile: armadillo800eva: Enable power button as wakeup source ARM: mach-shmobile: armadillo800eva: Fix GPIO buttons descriptions
2012-08-27Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesOlof Johansson8-8/+42
Fixes for AT91 related to: - move to sparse IRQ: some drivers were forgotten - a DTS typo - the delay for removal of old at91_mci driver * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91/feature-removal-schedule: delay at91_mci removal ARM: at91/dts: remove partial parameter in at91sam9g25ek.dts ARM: at91/clock: fix PLLA overclock warning ARM: at91: fix rtc-at91sam9 irq issue due to sparse irq support ARM: at91: fix system timer irq issue due to sparse irq support
2012-08-27Merge branch 'fixes' of ↵Olof Johansson1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas into fixes * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: ARM: shmobile: sh73a0: fixup RELOC_BASE of intca_irq_pins_desc
2012-08-25Merge tag 'fixes-3.6-rc3' of ↵Linus Torvalds45-96/+161
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc fixes from Arnd Bergmann: "Bug fixes for various ARM platforms. About half of these are for OMAP and submitted before but did not make it into v3.6-rc2." * tag 'fixes-3.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) ARM: ux500: don't select LEDS_GPIO for snowball ARM: imx: build i.MX6 functions only when needed ARM: imx: select CPU_FREQ_TABLE when needed ARM: imx: fix ksz9021rn_phy_fixup ARM: imx: build pm-imx5 code only when PM is enabled ARM: omap: allow building omap44xx without SMP ARM: dts: imx51-babbage: fix esdhc cd/wp properties ARM: imx6: spin the cpu until hardware takes it down ARM: ux500: Ensure probing of Audio devices when Device Tree is enabled ARM: ux500: Fix merge error, no matching driver name for 'snd_soc_u8500' ARM i.MX6q: Add virtual 1/3.5 dividers in the LDB clock path ARM: Kirkwood: fix Makefile.boot ARM: Kirkwood: Fix iconnect leds ARM: Orion: Set eth packet size csum offload limit ARM: mv78xx0: fix win_cfg_base prototype ARM: OMAP: dmtimers: Fix locking issue in omap_dm_timer_request*() ARM: mmp: fix potential NULL dereference ARM: OMAP4: Register the OPP table only for 4430 device cpufreq: OMAP: Handle missing frequency table on SMP systems ARM: OMAP4: sleep: Save the complete used register stack frame ...
2012-08-25ARM: mach-shmobile: armadillo800eva: Enable power button as wakeup sourceLaurent Pinchart1-2/+3
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-08-25ARM: mach-shmobile: armadillo800eva: Fix GPIO buttons descriptionsLaurent Pinchart1-4/+4
The GPIO buttons are named SW3, SW4, SW5 and SW6 on the board silkscreen. Update the buttons descriptions accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-08-23Merge branch 'randconfig/mach' into fixesArnd Bergmann8-10/+12
Small platform specific bug fixes for problems found in randconfig builds. * randconfig/mach: ARM: ux500: don't select LEDS_GPIO for snowball ARM: imx: build i.MX6 functions only when needed ARM: imx: select CPU_FREQ_TABLE when needed ARM: imx: fix ksz9021rn_phy_fixup ARM: imx: build pm-imx5 code only when PM is enabled ARM: omap: allow building omap44xx without SMP Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-08-23ARM: ux500: don't select LEDS_GPIO for snowballArnd Bergmann2-1/+1
Using 'select' in Kconfig is hard, a platform cannot just enable a driver without also making sure that its subsystem is there. Also, there is no actual code dependency between the platform and the gpio leds driver. Without this patch, building without LEDS_CLASS esults in: drivers/built-in.o: In function `create_gpio_led.part.2': governor_userspace.c:(.devinit.text+0x5a58): undefined reference to `led_classdev_register' drivers/built-in.o: In function `gpio_led_remove': governor_userspace.c:(.devexit.text+0x6b8): undefined reference to `led_classdev_unregister' This reverts 8733f53c6 "ARM: ux500: Kconfig: Compile in leds-gpio support for Snowball" that introduced the regression and did not provide a helpful explanation. In order to leave the GPIO LED code still present in normal builds, this also enables the symbol in u8500_defconfig, in addition to the other LED drivers that are already selected there. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Lee Jones <lee.jones@linaro.org>
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