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2012-09-27arm64: ptrace: remove obsolete ptrace request numbers from user headersWill Deacon2-17/+12
2012-09-24arm64: Do not set the SMP/nAMP processor bitCatalin Marinas1-11/+0
2012-09-17arm64: Build infrastructureCatalin Marinas12-0/+648
2012-09-17arm64: Miscellaneous header filesCatalin Marinas10-0/+479
2012-09-17arm64: Generic timers supportMarc Zyngier3-0/+194
2012-09-17arm64: Loadable modulesWill Deacon2-0/+479
2012-09-17arm64: Miscellaneous library functionsMarc Zyngier8-0/+369
2012-09-17arm64: Performance counters supportWill Deacon3-0/+1472
2012-09-17arm64: Debugging supportWill Deacon5-0/+2519
2012-09-17arm64: Floating point and SIMDCatalin Marinas3-0/+250
2012-09-17arm64: 32-bit (compat) applications supportWill Deacon7-0/+2452
2012-09-17arm64: User access library functionsCatalin Marinas7-0/+642
2012-09-17arm64: Signal handling supportCatalin Marinas5-0/+583
2012-09-17arm64: VDSO supportWill Deacon11-0/+865
2012-09-17arm64: System calls handlingCatalin Marinas5-0/+290
2012-09-17arm64: ELF definitionsCatalin Marinas5-0/+305
2012-09-17arm64: SMP supportCatalin Marinas5-0/+783
2012-09-17arm64: DMA mapping APICatalin Marinas2-0/+203
2012-09-17arm64: Device specific operationsCatalin Marinas5-0/+466
2012-09-17arm64: Atomic operationsCatalin Marinas2-0/+441
2012-09-17arm64: IRQ handlingMarc Zyngier4-0/+230
2012-09-17arm64: TLB maintenance functionalityCatalin Marinas3-0/+383
2012-09-17arm64: Cache maintenance routinesCatalin Marinas5-0/+531
2012-09-17arm64: CPU supportCatalin Marinas6-0/+523
2012-09-17arm64: Process managementCatalin Marinas4-0/+846
2012-09-17arm64: MMU fault handling and page table managementCatalin Marinas8-0/+965
2012-09-17arm64: MMU initialisationCatalin Marinas3-0/+853
2012-09-17arm64: MMU definitionsCatalin Marinas9-0/+839
2012-09-17arm64: Exception handlingCatalin Marinas6-0/+1441
2012-09-17arm64: Kernel booting and initialisationCatalin Marinas3-0/+883
2012-09-17arm64: Assembly macros and definitionsCatalin Marinas4-0/+273