| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 1 | -12/+1 |
| 2018-12-10 | arm64: Kconfig: Re-jig CONFIG options for 52-bit VA | Will Deacon | 1 | -1/+1 |
| 2018-12-10 | arm64: mm: introduce 52-bit userspace support | Steve Capper | 1 | -0/+3 |
| 2018-11-20 | arm64: mm: apply r/o permissions of VM areas to its linear alias as well | Ard Biesheuvel | 1 | -0/+2 |
| 2018-09-18 | arm64: mm: Support Common Not Private translations | Vladimir Murzin | 1 | -2/+15 |
| 2018-02-16 | arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables | Will Deacon | 1 | -2/+2 |
| 2018-01-16 | arm64: kpti: Fix the interaction between ASID switching and software PAN | Catalin Marinas | 1 | -1/+2 |
| 2018-01-15 | arm64: fix ID map extension to 52 bits | Kristina Martsenko | 1 | -3/+2 |
| 2017-12-22 | Merge branch 'for-next/52-bit-pa' into for-next/core | Catalin Marinas | 1 | -1/+11 |
| 2017-12-22 | arm64: allow ID map to be extended to 52 bits | Kristina Martsenko | 1 | -0/+10 |
| 2017-12-22 | arm64: handle 52-bit addresses in TTBR | Kristina Martsenko | 1 | -1/+1 |
| 2017-12-11 | arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003 | Will Deacon | 1 | -2/+0 |
| 2017-12-11 | arm64: mm: Move ASID from TTBR0 to TTBR1 | Will Deacon | 1 | -0/+7 |
| 2017-12-06 | arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlb | Will Deacon | 1 | -14/+10 |
| 2017-12-06 | arm64: SW PAN: Point saved ttbr0 at the zero page when switching to init_mm | Will Deacon | 1 | -9/+13 |
| 2017-03-02 | sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linu... | Ingo Molnar | 1 | -0/+1 |
| 2017-03-02 | sched/headers: Prepare for new header dependencies before moving code to <lin... | Ingo Molnar | 1 | -0/+1 |
| 2017-02-10 | arm64: Work around Falkor erratum 1003 | Christopher Covington | 1 | -1/+7 |
| 2017-01-12 | arm64: Use __pa_symbol for kernel symbols | Laura Abbott | 1 | -3/+3 |
| 2016-11-21 | arm64: Disable TTBR0_EL1 during normal kernel execution | Catalin Marinas | 1 | -14/+39 |
| 2016-09-09 | arm64: simplify contextidr_thread_switch | Mark Rutland | 1 | -6/+3 |
| 2016-09-09 | arm64: simplify sysreg manipulation | Mark Rutland | 1 | -17/+10 |
| 2016-02-25 | arm64: Ensure the secondary CPUs have safe ASIDBits size | Suzuki K Poulose | 1 | -0/+2 |
| 2016-02-16 | arm64: mm: add code to safely replace TTBR1_EL1 | Mark Rutland | 1 | -0/+19 |
| 2016-02-16 | arm64: add function to install the idmap | Mark Rutland | 1 | -2/+14 |
| 2016-02-16 | arm64: unify idmap removal | Mark Rutland | 1 | -0/+25 |
| 2016-02-16 | arm64: mm: place empty_zero_page in bss | Mark Rutland | 1 | -1/+1 |
| 2015-11-18 | arm64: use non-global mappings for UEFI runtime regions | Ard Biesheuvel | 1 | -1/+1 |
| 2015-10-07 | arm64: switch_mm: simplify mm and CPU checks | Will Deacon | 1 | -2/+4 |
| 2015-10-07 | arm64: mm: rewrite ASID allocator and MM context-switching code | Will Deacon | 1 | -65/+11 |
| 2015-10-07 | arm64: mm: remove unused cpu_set_idmap_tcr_t0sz function | Will Deacon | 1 | -23/+12 |
| 2015-04-16 | Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a... | Linus Torvalds | 1 | -0/+43 |
| 2015-03-23 | arm64: Use the reserved TTBR0 if context switching to the init_mm | Catalin Marinas | 1 | -0/+9 |
| 2015-03-23 | arm64: mm: increase VA range of identity map | Ard Biesheuvel | 1 | -0/+43 |
| 2013-06-07 | arm64: mm: don't bother invalidating the icache in switch_mm | Will Deacon | 1 | -6/+0 |
| 2013-02-11 | arm64: mm: update CONTEXTIDR register to contain PID of current process | Will Deacon | 1 | -0/+15 |
| 2012-09-17 | arm64: Process management | Catalin Marinas | 1 | -0/+152 |
