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2022-11-15arm64: dts: msm8998: unify PCIe clock order withMSM8996Krzysztof Kozlowski1-4/+4
PCIe on MSM8996 and MSM8998 use the same clocks, so use one order to make the binding simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221115125310.184012-4-krzysztof.kozlowski@linaro.org
2022-11-15arm64: dts: msm8998: add MSM8998 specific compatibleKrzysztof Kozlowski1-1/+1
Add new compatible for MSM8998 (compatible with MSM8996) to allow further customizing if needed and to accurately describe the hardware. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221115125310.184012-3-krzysztof.kozlowski@linaro.org
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable WiFi controllerJohan Hovold1-0/+65
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-10-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable modemJohan Hovold1-0/+65
Enable the modem connected to the PCIe3a M.2 connector. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-9-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSDJohan Hovold1-0/+72
Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-8-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable WiFi controllerJohan Hovold1-0/+65
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-7-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable SDX55 modemJohan Hovold1-0/+65
Enable the SDX55 modem connected to PCIe3. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-6-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable NVMe SSDJohan Hovold1-0/+63
Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-5-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulatorsJohan Hovold1-2/+2
Rename the backlight and misc regulators according to the net names. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-4-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sa8295p-adp: enable PCIeJohan Hovold1-0/+171
The SA8295P-ADP has up to four PCIe interfaces implemented by three or four controllers: PCIe2A, PCIe3A/PCIe3B and PCIe4. PCIe2 is used in x4 mode, while PCIe3 can be used in either x2 or x4 mode. Enable both PCIe3A and PCI3B in x2 mode for now. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-3-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodesJohan Hovold2-5/+547
The SC8280XP platform has seven PCIe controllers: PCIe0 USB4 PCIe1 USB4 PCIe2A 4-lane PCIe2B 2-lane PCIe3A 4-lane PCIe3B 2-lane PCIe4 1-lane while SA8540P only has five (PCIe2-4). Add devicetree nodes for the PCIe2-4 controllers and their PHYs. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-2-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: add sdm670 and pixel 3a device treesRichard Acayan3-0/+1692
The Qualcomm Snapdragon 670 has been out for a while. Add a device tree for it and the Google Pixel 3a as the first device. The Pixel 3a has the same bootloader issue as the Pixel 3 and will not work on Android 10 bootloaders or later until it gets fixed for the Pixel 3. SoC Initial Features: - power management - clocks - pinctrl - eMMC - USB 2.0 - GENI I2C - IOMMU - RPMh - interrupts Device-Specific Initial Features: - side buttons (keys) - regulators - touchscreen Signed-off-by: Richard Acayan <mailingradian@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221111001818.124901-5-mailingradian@gmail.com
2022-11-11arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragmentSibi Sankar9-47/+77
The Google Herobrine WIFI SKU can save 256M by not having modem/mba/rmtfs memory regions defined. Add the dts fragment and mark all the board files appropriately. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110070813.1777-2-quic_sibis@quicinc.com
2022-11-11arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTESibi Sankar2-1/+1
When the modem node was re-located to a separate LTE source file "sc7280-herobrine-lte-sku.dtsi", some of the previous LTE users weren't marked appropriately. Fix this by marking all Qualcomm reference devices as LTE. Suggested-by: Douglas Anderson <dianders@chromium.org> Fixes: d42fae738f3a ("arm64: dts: qcom: Add LTE SKUs for sc7280-villager family") Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110070813.1777-1-quic_sibis@quicinc.com
2022-11-11arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD cardLuca Weiss1-2/+37
Fairphone 4 uses sdhc_2 for the SD card, configure the pins for it and enable it. The regulators which are exclusively used for SDHCI have their maximum voltage decreased to what downstream sets on the consumer side, like on many other platforms and allowed to set the load. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110151507.53650-1-luca.weiss@fairphone.com
2022-11-11arm64: dts: qcom: sm8450: drop incorrect spi-max-frequencyKrzysztof Kozlowski1-7/+0
spi-max-frequency is a property of SPI device, not the controller: qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110152741.542024-1-krzysztof.kozlowski@linaro.org
2022-11-09arm64: dts: qcom: sc8280xp-x13s: Add LID switchBjorn Andersson1-0/+24
Add gpio-keys for exposing the LID switch state. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220730193617.1688563-1-bjorn.andersson@linaro.org
2022-11-09arm64: dts: qcom: ipq8074: align TLMM pin configuration with DT schemaKrzysztof Kozlowski1-5/+5
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221108142357.67202-2-krzysztof.kozlowski@linaro.org
2022-11-09arm64: dts: qcom: sc7280: Remove redundant soundwire propertySrinivasa Rao Mandadapu1-1/+0
Remove redundant and undocumented property qcom,port-offset in soundwire controller nodes. This patch is required to avoid dtbs_check errors with qcom,soundwire.yaml Fixes: 12ef689f09ab ("arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1667918763-32445-4-git-send-email-quic_srivasam@quicinc.com
2022-11-09arm64: dts: qcom: sm8250: Remove redundant soundwire propertySrinivasa Rao Mandadapu1-1/+0
Remove redundant and undocumented property qcom,port-offset in soundwire controller nodes. This patch is required to avoid dtbs_check errors with qcom,soundwire.yaml Fixes: 24f52ef0c4bf ("arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1667918763-32445-3-git-send-email-quic_srivasam@quicinc.com
2022-11-09arm64: dts: qcom: Update soundwire secondary node namesSrinivasa Rao Mandadapu5-10/+10
Update soundwire secondary nodes of WSA speaker to match with dt-bindings pattern properties regular expression. This modification is required to avoid dtbs-check errors occurred with qcom,soundwire.yaml. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1667918763-32445-2-git-send-email-quic_srivasam@quicinc.com
2022-11-09arm64: dts: qcom: sc7280-idp: don't modify &ipa twiceAlex Elder1-5/+0
In "sc7280-idp.dts", the IPA node is modified after being defined. However that file includes "sc7280-idp.dtsi", which also modifies the IPA node (in the same way). This only needs to be done in "sc7280-idp.dtsi". Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221108201625.1220919-1-elder@linaro.org
2022-11-09arm64: dts: qcom: Add power-domains property for apps_rscMaulik Shah4-0/+4
Add power-domains property which allows apps_rsc device to attach to cluster power domain on sm8150, sm8250, sm8350 and sm8450. Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8450 Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221018152837.619426-4-ulf.hansson@linaro.org
2022-11-07arm64: dts: qcom: msm8996: change order of SMMU clocks on this platformDmitry Baryshkov1-16/+15
Change order of SMMU clocks to match the schema. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221102184420.534094-2-dmitry.baryshkov@linaro.org
2022-11-07arm64: dts: qcom: sdm632: fairphone-fp3: add touchscreenJob Noorman1-0/+14
Add Himax hx83112b touchscreen to the FP3 DT. Signed-off-by: Job Noorman <job@noorman.info> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107105604.26541-4-job@noorman.info
2022-11-07arm64: dts: qcom: Add device tree for Sony Xperia 10 IVKonrad Dybcio2-0/+87
Add support for Sony Xperia 10 IV, a.k.a PDX225. This device is a part of the SoMC SM6375 Murray platform and currently it is the only device based on that board, so no -common DTSI is created until (if?) other Murray devices appear. This commit brings support for: * USB (only USB2 for now) * Display via simplefb To create a working boot image, you need to run: cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm6375-sony-xperia-\ murray-pdx225.dtb > .Image.gz-dtb mkbootimg \ --kernel .Image.gz-dtb \ --ramdisk some_initrd.img \ --pagesize 4096 \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --tags_offset 0x100 \ --cmdline "SOME_CMDLINE" \ --dtb_offset 0x1f00000 \ --header_version 1 \ --os_version 12 \ --os_patch_level 2022-04 \ # or newer -o boot.img-sony-xperia-pdx225 Then, you need to flash it on the device and get rid of all the vendor_boot/dtbo mess: First, you need to get rid of vendor_boot. However, the bootloader is utterly retarded and it will not let you neither flash nor erase it. There are a couple ways to handle this: you can either dd /dev/zero to it from Android (if you have root) or a custom recovery or from fastbootd (fastboot/adb reboot fastboot). You will not be able to boot Android images on your phone unless you lock the bootloader (fastboot oem lock) and restore the factory image with Xperia Companion Windows-and-macOS-only software. The best way so far is probably to use the second (_b) slot and flash mainline there. This will however require you to flash some partitions manually, as they are not populated from factory: (boot_b, dtbo_b, vendor_boot_b, vbmeta_b, vbmeta_system_b) - these we don't really care about as we nuke/replace them (dsp_b, imagefv_b, modem_b, oem_b, rdimage_b) - these you NEED to populate to get a successful boot on slot B, otherwise you will have limited / no functionality. To switch slots, simply run: fastboot --set-active=a //or =b The rest assumes you are on slot A. // You have to either pull vbmeta{"","_system"} from // /dev/block/bootdevice/by-name/ or build one as a part of AOSP fastboot --disable-verity --disable-verification flash vbmeta_b vbmeta.img fastboot --disable-verity --disable-verification flash vbmeta_system_b \ vbmeta_system.img fastboot flash boot_b boot.img-sony-xperia-pdx225 fastboot reboot fastboot // entering fastbootd fastboot flash vendor_boot_b emptything.img fastboot flash dtbo_b emptything.img fastboot reboot bootloader // entering bootloader fastboot fastboot --set-active=b fastboot reboot // mainline time! Where emptything.img is a tiny file that consists of 2 bytes (all zeroes), doing a "fastboot erase" won't cut it, the bootloader will go crazy and things will fall apart when it tries to overlay random bytes from an empty partition onto a perfectly good appended DTB. From there on you can flash new mainline builds by simply flashing boot.img that you create after each kernel rebuild. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107120920.12593-4-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: Add initial device tree for SM6375Konrad Dybcio1-0/+804
Add an initial device tree for the SM6375 (SD695) SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107120920.12593-3-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: sc7180: Fully describe fingerprint node on TrogdorStephen Boyd1-2/+18
Update the fingerprint node on Trogdor to match the fingerprint DT binding. This will allow us to drive the reset and boot gpios from the driver when it is re-attached after flashing. We'll also be able to boot the fingerprint processor if the BIOS isn't doing it for us. Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107191535.624371-3-swboyd@chromium.org
2022-11-07arm64: dts: qcom: sc7280: Fully describe fingerprint node on HerobrineStephen Boyd1-1/+4
Update the fingerprint node on Herobrine to match the fingerprint DT binding. This will allow us to drive the reset and boot gpios from the driver when it is re-attached after flashing. We'll also be able to boot the fingerprint processor if the BIOS isn't doing it for us. Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107191535.624371-2-swboyd@chromium.org
2022-11-07arm64: dts: qcom: sm6125: Enable Command Queue Engine (CQE) for SDHCI 1Marijn Suijten1-0/+2
Downstream sources confirm sm6125 supports CQE, and after fixing the reg name for this range [1] this feature probes and enables correctly: [ 0.391950] sdhci_msm 4744000.mmc: mmc0: CQE init: success [1]: https://lore.kernel.org/all/20221026163646.37433-1-krzysztof.kozlowski@linaro.org/ Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107214702.311271-1-marijn.suijten@somainline.org
2022-11-07arm64: dts: qcom: sm6125: fix SDHCI CQE reg namesKrzysztof Kozlowski1-1/+1
SM6125 comes with SDCC (SDHCI controller) v5, so the second range of registers is cqhci, not core. Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Sony Xperia 10 II Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026163646.37433-1-krzysztof.kozlowski@linaro.org
2022-11-07arm64: dts: qcom: pm8998: adjust coincell node name to bindingsLuca Weiss1-1/+1
The spmi-pmic bindings say that pm8941-coincell should be called 'charger'. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221031175119.939860-3-luca@z3ntu.xyz
2022-11-07arm64: dts: qcom: pm6150/l/pm7325/pms405: Fix up commentsKonrad Dybcio4-4/+12
Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-12-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: qcs404-*: Fix up commentsKonrad Dybcio4-4/+12
Switch '//' comments to C-style /* */. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-11-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm8994-*: Fix up commentsKonrad Dybcio2-2/+4
Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-10-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm8992-*: Fix up commentsKonrad Dybcio4-22/+28
Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Also, trim off downstream regulator properties from comments to prevent them from accidentally landing into mainline one day.. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-9-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: ipq8074-*: Fix up commentsKonrad Dybcio4-9/+12
Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Also, fix up some whitespace within comments. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-8-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: sdm845-*: Fix up commentsKonrad Dybcio3-18/+27
Switch '//' comments to C-style /* */. Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-7-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: sc8280xp-x13s: Fix up commentsKonrad Dybcio1-1/+1
Switch '//' comments to C-style /* */. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-6-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm8998-*: Fix up commentsKonrad Dybcio2-12/+4
Switch '//' comments to C-style /* */ and fix up the contents of some. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-5-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm8953: Fix up commentsKonrad Dybcio1-3/+3
Switch '//' comments to C-style /* */ and fix up the contents of some. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-4-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm/apq8x96-*: Fix up commentsKonrad Dybcio2-8/+9
Switch '//' comments to C-style /* */ and fix up the contents of some. Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Also, fix up a single raw '2' to PM8994_GPIO_S4 while at it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-3-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: msm/apq8x16-*: Fix up commentsKonrad Dybcio7-13/+19
Switch '//' comments to C-style /* */ and fix up the contents of some. Make sure all multiline C-style commends begin with just '/*' with the comment text starting on a new line. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-2-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: qcs404: align TLMM pin configuration with DT schemaKrzysztof Kozlowski3-67/+71
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221104161131.57719-1-krzysztof.kozlowski@linaro.org
2022-11-07arm64: dts: qcom: hk01: use GPIO flags for tlmmRobert Marko1-2/+3
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of harcoding the cell value. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107092930.33325-3-robimarko@gmail.com
2022-11-07arm64: dts: qcom: hk10: use GPIO flags for tlmmRobert Marko1-2/+3
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of harcoding the cell value. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107092930.33325-2-robimarko@gmail.com
2022-11-07arm64: dts: qcom: hk10: use "okay" instead of "ok"Robert Marko1-8/+8
Use "okay" instead of "ok" in USB nodes as "ok" is deprecated. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107092930.33325-1-robimarko@gmail.com
2022-11-07arm64: dts: qcom: sc8280xp: fix USB MP QMP PHY nodesJohan Hovold1-38/+24
Update the USB MP QMP PHY nodes to match the new binding which specifically includes the missing register regions (e.g. PCS_USB). Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107081705.18446-1-johan+linaro@kernel.org
2022-11-07arm64: dts: qcom: sc7280: sort out the "Status" to last property with ↵Sheng-Liang Pan1-7/+7
sc7280-herobrine-audio-rt5682.dtsi To keep diffs clean, sort out "Status" to last property. Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107173954.v11.5.I4c6d97e6f3cf8cdc691d2d4519883c3018dd4372@changeid
2022-11-07arm64: dts: qcom: sc7280: add sc7280-herobrine-audio-rt5682-3mic3.dtsi for ↵Sheng-Liang Pan2-0/+196
evoker add specific 3mic setting as sc7280-herobrine-audio-rt5682-3mic.dtsi, so we can include sc7280-herobrine-audio-rt5682-3mic.dtsi for evoker as it uses rt5682 with 3 mics. Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107173954.v11.4.I9718ac3622fa550e432209ae5c95c87b873a0f87@changeid
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-12 21:00:47 +0000