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2016-04-28Merge tag 'renesas-arm64-dt2-for-v4.7' of ↵Arnd Bergmann2-3/+112
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.7" from Simon Horman: * Don't disable referenced optional clocks in DT of r8a7795 SoC * Populate EXTALR in DT of salvator-x board * Enable PCIe in DT of salvator-x board * tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7795: Don't disable referenced optional clocks arm64: dts: salvator-x: populate EXTALR arm64: dts: r8a7795: enable PCIe on Salvator-X arm64: dts: r8a7795: Add PCIe nodes arm64: dts: r8a7795: Use USB3.0 fallback compatibility string arm64: dts: r8a7795: Add CAN support arm64: dts: r8a7795: Add CAN external clock support
2016-04-27arm64: dts: r8a7795: Don't disable referenced optional clocksGeert Uytterhoeven2-4/+2
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: salvator-x: populate EXTALRWolfram Sang1-0/+4
It can be used for the watchdog. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: enable PCIe on Salvator-XPhil Edworthy1-0/+12
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Add PCIe nodesPhil Edworthy1-0/+57
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28arm64: dts: r8a7795: Use USB3.0 fallback compatibility stringSimon Horman1-2/+2
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-28arm64: dts: r8a7795: Add CAN supportRamesh Shanmugasundaram1-0/+30
Adds CAN controller nodes for r8a7795. Note: CAN channel register base address mentioned in R-Car Gen3 Hardware User Manual v0.5E is incorrect. The corrected base addresses are: CAN Channel 0 - 0xe6c30000 CAN Channel 1 - 0xe6c38000 Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28arm64: dts: r8a7795: Add CAN external clock supportRamesh Shanmugasundaram1-0/+8
Adds external CAN clock node for r8a7795. This clock can be used as fCAN clock of CAN and CAN FD controller. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28arm64: dts: salvator-x: use generic pinctrl propertiesSimon Horman1-23/+23
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and groups properties") renesas pfc drivers accept generic "function", "pins" and "groups" properties. This patch updates the kzm9g device tree to use the generic properties. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2Yoshihiro Shimoda1-0/+16
We should set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2Yoshihiro Shimoda1-0/+24
This board has a MAX3355 chip. However, we cannot use the extcon/max3355 driver because the ID pin doesn't connect to a gpio pin (in other words, it connects to the SoC specific pin). And, the phy-rcar-gen3-usb2 driver cannot handle such a chip for now. So, this patch enables usb2_phy of channel 1 and 2. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodesYoshihiro Shimoda1-0/+66
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: add usb2_phy device nodesYoshihiro Shimoda1-0/+28
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: use fallback etheravb compatibility stringSimon Horman1-1/+2
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26arm64: dts: r8a7795: salvator-x: enable SDHI0 & 3Ai Kyuse1-0/+83
Add the exposed SD card slots. The on-board eMMC needs to wait until we fixed the 8bit support. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: Add SDHI support to dtsiAi Kyuse1-0/+38
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [wsa: squashed some fixes and added mmc-caps] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19arm64: dts: r8a7795: Add GIC-400 virtual interfacesDirk Behme1-1/+3
Besides the distributor and the CPU interface the GIC-400 additionally supports the virtual interface control blocks and the virtual CPU interfaces. Add the physical base addresses and size for these. See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/index.html -> 3.2. GIC-400 register map and Linux kernel's Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt for more details. For the at GICH Virtual interface control blocks at 0xf1040000 cover the whole 128kB (0x20000) range. This is done based on the advice from Marc Zyngier http://www.spinics.net/lists/arm-kernel/msg483139.html Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add INTC-EX device nodeMagnus Damm1-0/+15
Add a single r8a7795 INTC-EX device node to support external IRQ pins IRQ0 -> IRQ5. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add CA53 L2 cache-controller nodeGeert Uytterhoeven1-0/+6
Add a device node for the Cortex-A53 L2 cache-controller. The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as 32 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add missing properties to CA57 L2 cache nodeGeert Uytterhoeven1-0/+2
Add the missing "cache-unified" and "cache-level" properties to the Cortex-A57 cache-controller node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-16arm64: dts: r8a7795: use GIC_* definesSimon Horman1-54/+54
Use GIC_* defines for GIC interrupt cells in r8a7795 device tree. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-08arm64: dts: r8a7795: pmu: switch to Cortex specific device nodesDirk Behme1-2/+2
Instead of using the generic armv8-pmuv3 compatibility use the more specific Cortex A57 compatibility. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-05arm64: dts: r8a7795: Add L2 cache-controller nodesGeert Uytterhoeven1-0/+8
Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03arm64: dts: salvator-x: Enable SCIF_CLK frequency and pinsGeert Uytterhoeven1-0/+12
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates: - SCIF: - Supports now 50, 230400, 460800, 500000, and 921600 bps, - Perfect match for standard 50-460800, and 9216000 bps. - HSCIF: - Supports now 50, 75, and 110 bps, - Perfect match for standard 50-460800, and 9216000 bps. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03arm64: dts: r8a7795: Add BRG support for (H)SCIFGeert Uytterhoeven1-22/+52
Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depend on the actual board. Add the two optional clock sources (S3D1 and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03arm64: dts: r8a7795: Rename the serial port clock to fckGeert Uytterhoeven1-11/+11
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02arm64: dts: r8a7795: Add SCIF fallback compatibility stringsGeert Uytterhoeven1-11/+27
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02arm64: dts: r8a7795: Add USB-DMAC device nodesYoshihiro Shimoda1-0/+26
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02arm64: dts: salvator-x: enable usb3.0 host channel 0Yoshihiro Shimoda1-0/+4
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-26arm64: dts: r8a7795: Add USB3.0 host device nodesYoshihiro Shimoda1-0/+18
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-25arm64: dts: r8a7795: Complete SYS-DMAC nodesGeert Uytterhoeven1-3/+90
Complete the dma-controller nodes for SYS-DMAC 0 to 2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: renesas: r8a7795: fix SATA clock assignmentUlrich Hecht1-1/+1
SATA clock is 815, not 915. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: salvator-x: Enable SATA controllerKouei Abe1-0/+4
This enables SATA device in r8a7795-salvator-x.dts. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add SATA controller nodeKouei Abe1-0/+8
This adds SATA device node to r8a7795.dtsi. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> [uli: adjusted for new MSTP clock scheme] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: renesas: r8a7795: add internal delay for i2c IPsWolfram Sang1-0/+7
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add pmu device nodesYoshifumi Hosoya1-0/+12
Enabling the performance monitor unit on r8a7795. Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add Cortex-A57 CPU coresGaku Inami1-6/+25
Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57. Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Sigend-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add PSCI nodeGaku Inami1-0/+6
Add PSCI node for r8a7795 SoC, and cpu node enable-method property is set to "psci". Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-01arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_BKuninori Morimoto1-0/+38
CS2000 needs AUDIO_CLKOUT as master clock which is generated by Renesas sound, and Renesas sound needs CS2000 as ADUIO_CLK_B. Because of this relationship, it will be dead-lock when driver probe. cs2000: clk_multiplier@4f { ... clocks = <&rcar_sound 0>, <&x12_clk>; ... }; &rcar_sound { ... assigned-clocks = <&cs2000>; ... }; This patch is using dummy audio_clkout to avoid this issue. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-30arm64: renesas: salvator-x: set ak4613 In/Out pin as single-endKuninori Morimoto1-0/+9
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound DVC supportKuninori Morimoto1-2/+25
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SRC supportKuninori Morimoto1-2/+2
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI DMA support via BUSIFKuninori Morimoto1-5/+0
DMA transfer to/from SSIU DMA [MEM] -> [SSIU] -> [SSI] DMA [MEM] <- [SSIU] <- [SSI] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI DMA supportKuninori Morimoto1-2/+2
DMA transfer to/from SSI DMA [MEM] -> [SSI] DMA [MEM] <- [SSI] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: salvator-x: Sound SSI PIO supportKuninori Morimoto1-0/+76
This patch adds PIO sound support for Salvator-X board. It can use 44.1kHz base sound only at this point, since 48kHz base sound needs CS2000, but it is not yet upstreamed. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound DVC supportKuninori Morimoto1-0/+13
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SRC supportKuninori Morimoto1-0/+61
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SSI DMA supportKuninori Morimoto1-0/+20
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SSI PIO supportKuninori Morimoto1-0/+95
This patch adds SSI for PIO sound support Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: add AUDIO_DMAC supportKuninori Morimoto1-0/+64
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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