| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
The node names should be generic and DT schema expects certain pattern:
qcom/msm8998-oneplus-cheeseburger.dtb: leds: 'button-backlight' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
qcom/sc7180-trogdor-coachz-r1.dtb: pwmleds: 'keyboard-backlight' does not match any of the regexes: '^led(-[0-9a-f]+)?$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221125144209.477328-1-krzysztof.kozlowski@linaro.org
|
|
Update the fingerprint node on Herobrine to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107191535.624371-2-swboyd@chromium.org
|
|
1. Add drive strength property for mi2s1 on sc7280 based platforms.
2. Disable the pull-up for mi2s1 lines.
Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220721083849.1571744-2-judyhsiao@chromium.org
|
|
Add SNPS HS Phy tuning parameters for herobrine variant of
SC7280 devices.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1664462290-29869-1-git-send-email-quic_kriskura@quicinc.com
|
|
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
I already tried to do this in commit d801357a0573 ("arm64: dts: qcom:
sc7280: align TLMM pin configuration with DT schema") and I missed the
fact that these nodes were not part of "state" node. Bindings did not
catch these errors due to its own issues.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220930192954.242546-5-krzysztof.kozlowski@linaro.org
|
|
Add nodes for the onboard USB hub on herobrine devices. Remove the
'always-on' property from the hub regulator, since the regulator
is now managed by the onboard_usb_hub driver.
This requires "CONFIG_USB_ONBOARD_HUB=y".
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220722093238.v24.2.I18481b296484eec47bdc292a31fa46fa8c655ca9@changeid
|
|
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-40-krzysztof.kozlowski@linaro.org
|
|
Add max98360a codec node for audio use case on all herobrine boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1657200184-29565-8-git-send-email-quic_srivasam@quicinc.com
|
|
The USB 2.0 port of sc7280 is currently not used by any herobrine
board. Delete the device tree entries that enable it.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220826084813.1.I8c9a771fcf4d1cfb6e8e0ef17a153143af9a644d@changeid
|
|
Replace deprecated perst-gpio and wake-gpio properties with up-to-date
perst-gpios and wake-gpios in the Qualcomm device trees.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-9-dmitry.baryshkov@linaro.org
|
|
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled
by dp combo phy. Therefore remove them from dp controller.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1657556603-15024-1-git-send-email-quic_khsieh@quicinc.com
|
|
Add common LED property - the function - to LED node.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-9-krzysztof.kozlowski@linaro.org
|
|
To ease matching configuration of sysfs attributes for particular
sensor, match label reported by iio 'label' attribute with the location
label generated by ChromeOS config tool.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220623223119.1858863-1-gwendal@chromium.org
|
|
sc7280-herobrine based boards are specced to be able to access their
SPI flash at 50 MHz with the drive strength of the pins set at 8. The
drive strength is already set to 8 in "sc7280-herobrine.dtsi", so
let's bump up the clock. The matching firmware change for this is at:
https://review.coreboot.org/c/coreboot/+/63948
NOTE: the firmware change isn't _required_ to make the kernel work at
50 MHz, it merely shows that the boards are known to work fine at 50
MHz.
ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file
which is used by both herobrine boards and IDP. At the moment the IDP
boards aren't configuring a drive strength of 8 and it seems safer to
just leave them at the slower speed if they're already working.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid
|
|
This enables DisplayPort for herobrine boards.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220513065704.1.I9b9b9d4d1a3e0350a89221892261881a1771ad15@changeid
|
|
On herobrine boards the keyboard backlight is controlled through the
PWM LED driver. Currently both the PWM LED node and the node for the
keyboard backlight are disabled in sc7280-herobrine.dtsi, which
requires boards with a backlit keyboard to enable both nodes. There
are no other PWM LEDs on herobrine boards besides the keyboard
backlight, delete the 'disabled' status from the keyboard backlight
node, with that boards only have to enable the 'pwmleds' node for
keyboard backlight support.
Also add a label to the 'pwmleds' node to allow board files to refer to
it with a phandle.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220523123157.v2.1.I47ec78581907f7ef024f10bc085f970abf01ec11@changeid
|
|
Add eDP support to herobrine boards, splitting up amongst the
different files as makes sense. Rationale for the current split of
things:
* The eDP connector itself is on qcard. However, not all devices with
a qcard will use an eDP panel. Some might use MIPI and, presumably,
someone could build a device with qcard that had no display at all.
* The qcard provides a PWM for backlight that goes to the eDP
connector. This PWM is also provided to the board and it's expected
that it would be used as the backlight PWM even for herobrine
devices with MIPI displays.
* It's currently assumed that all herobrine boards will have some sort
of display, either MIPI or eDP (but not both).
* We will assume herobrine-rev1 has eDP. The schematics allow for a
MIPI panel to be hooked up but, aside from some testing, nobody is
doing this and most boards don't have all the parts stuffed for
it. The two panels would also share a PWM for backlight, which is
weird.
* herobrine-villager and herobrine-hoglin (crd) also have eDP.
* herobrine-hoglin (crd) has slightly different regulator setup for
the backlight. It's expected that this is unique to this board. See
comments in the dts file.
* There are some regulators that are defined in the qcard schematic
but provided by the board like "vreg_edp_bl" and
"vreg_edp_3p3". While we could put references to these regulators
straight in the qcard.dtsi file, this would force someone using
qcard that didn't provide those regulators to provide a dummy or do
an ugly /delete-node/. Instead, we'll add references in
herobrine.dtsi.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220426124053.v2.1.Iedd71976a78d53c301ce0134832de95a989c9195@changeid
|
|
The L2C rail on herobrine boards is intended to go to the audio
codec. Let's override the 1.62V specified in the qcard.dtsi file to be
1.8V.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411141332.v2.1.I9f06fec63b978699fe62591fec9e5ac31bb3a69d@changeid
|
|
Having these pins with outputs is good on a fresh boot because it puts
the boot and reset pins in a known "good" state. Unfortunately, that
conflicts with the fingerprint firmware flashing code. The firmware
flashing process binds and unbinds the cros-ec and spidev drivers and
that reapplies the pin output values after the flashing code has
overridden the gpio values. This causes a problem because we try to put
the device into bootloader mode, bind the spidev driver and that
inadvertently puts it right back into normal boot mode, breaking the
flashing process.
Fix this by removing the outputs. We'll introduce a binding for
fingerprint cros-ec specifically to set the gpios properly via gpio APIs
during cros-ec driver probe instead.
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220317010640.2498502-2-swboyd@chromium.org
|
|
While scoping signals, we found that the PCIe signals weren't
compliant at bootup. Specifically, the bootloader was setting up PCIe
and leaving it configured, then jumping to the kernel. The kernel was
turning off the regulator while leaving the PCIe clock running, which
was a violation.
In the regulator bindings (and the Linux kernel driver that uses
them), there's currently no way to specify that a GPIO-controlled
regulator should keep its state at bootup. You've got to pick either
"on" or "off". Let's switch it so that the PCIe regulator defaults to
"on" instead of "off". This should be a much safer way to go and
avoids the timing violation. The regulator will still be turned off
later if there are no users.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220310130429.1.Id41fda1d7f5d9230bc45c1b85b06b0fb0ddd29af@changeid
|
|
Not all herobrine boards have a world facing camera or a fingerprint
sensor, disable the regulators that feed these devices by default and
only enable them for the boards that use them.
Similarly the audio configuration can vary between boards, not all
boards have the regulator pp3300_codec, disable it by default.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220316172814.v1.3.Iad21bd53f3ac14956b8dbbf3825fc7ab29abdf97@changeid
|
|
Add nodes for the two SX9324 SAR proximity sensors. Not all herobrine
boards have these sensors, so leave them disabled by default.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220329105854.v3.1.Icedb2e3cd5e21f3a4ec535ddf756fa44d053b6ed@changeid
|
|
This node should be named sar1-irq-odl, not sar0-irq-odl. Otherwise
we'll overwrite the settings for sar0 with what is intended for sar1,
leading to probe failures for sar1 that are quite confusing.
Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1")
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220324223331.876199-1-swboyd@chromium.org
|
|
dtschema expects PWM node name to be a generic "pwm". This also matches
Devicetree specification requirements about generic node names.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220214081916.162014-4-krzysztof.kozlowski@canonical.com
|
|
Add the new herobrine-r1. Note that this is pretty much a re-design
compared to herobrine-r0 so we don't attempt any dtsi to share stuff
between them.
This patch attempts to define things at 3 levels:
1. The Qcard level. Herobrine includes a Qcard PCB and the Qcard PCB
is supposed to be the same (modulo stuffing options) across
multiple boards, so trying to define what's there hopefully makes
sense. NOTE that newer "CRD" boards from Qualcomm also use
Qcard. When support for CRD3 is added hopefully it can use the
Qcard include (and perhaps we should even evaluate it using
herobrine.dtsi?)
2. The herobrine "baseboard" level. Right now most stuff is here with
the exception of things that we _know_ will be different per
board. We know that not all boards will have the same set of eMMC,
nvme, and SD. We also know that the exact pin names are likely to
be different.
3. The actual "board" level, AKA herobrine-rev1.
NOTES:
- This boots to command prompt. We're still waiting on the PWM driver.
- This assumes LTE for now. Once it's clear how WiFi-only SKUs will
work we expect some small changes.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220204140550.v4.1.I5604b7af908e8bbe709ac037a6a8a6ba8a2bfa94@changeid
|
|
The upcoming herobrine-r1 board is really not very similar to
herobrine-r0. Let's get rid of the "herobrine.dtsi" file and stick all
the content in the -r0 dts file directly. We'll also rename the dts so
it's obvious that it's just for -r0.
While renaming, let's actually name the file so it's obvious that
"herobrine" is both the name of the board and the name of the
"baseboard". In other words "herobrine" is an actual board but also
often used as the name of a whole class of similar boards that forked
from a design. While "herobrine-herobrine" is a bit of mouthful it
makes it more obvious which things are part of an actual board rather
than the baseboard.
NOTE: herobrine-rev0's days are likely doomed and this device tree is
likely to be deleted in the future.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220125144316.v2.2.Id9716db8c133bcb14c9413144048f8d00ae2674f@changeid
|
|
Herobrine is a Chrome OS board/platform based on the QCA SC7280.
Add a .dtsi for the platform parts and a .dts for the board
specific bits. Currently the .dtsi has everything except the
compatible strings, things will likely get shuffled around in the
future as we learn more about the differences between boards.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007140854.1.I70615769f27bbaf7e480419d0f660f802b1fea43@changeid
|
