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2008-02-05add mm argument to pte/pmd/pud/pgd_freeBenjamin Herrenschmidt2-5/+5
(with Martin Schwidefsky <schwidefsky@de.ibm.com>) The pgd/pud/pmd/pte page table allocation functions get a mm_struct pointer as first argument. The free functions do not get the mm_struct argument. This is 1) asymmetrical and 2) to do mm related page table allocations the mm argument is needed on the free function as well. [kamalesh@linux.vnet.ibm.com: i386 fix] [akpm@linux-foundation.org: coding-syle fixes] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-01-28Merge branch 'orion' into develRussell King3-2/+530
* orion: (26 commits) [ARM] Orion: implement power-off method for QNAP TS-109/209 [ARM] Orion: add support for QNAP TS-109/TS-209 [ARM] Orion: I2C support [I2C] i2c-mv64xxx: Don't set i2c_adapter.retries [I2C] Split mv643xx I2C platform support [ARM] Orion: enable CONFIG_RTC_DRV_M41T80 for D-Link DNS-323 [ARM] Orion defconfig [ARM] Orion: add support for Orion/MV88F5181 based D-Link DNS-323 [ARM] Orion: MV88F5181 support bits [ARM] Orion: Buffalo/Revogear Kurobox Pro support [ARM] OrionNAS RD board support [ARM] Orion: support for Marvell Orion-2 (88F5281) Development Board [ARM] Orion: common platform setup for Gigabit Ethernet port [ARM] Orion: platform device registration for UART, USB and NAND [ARM] Orion: system timer support [ARM] Orion edge GPIO IRQ support [ARM] Orion: IRQ support [ARM] Orion: provide GPIO method for enabling hardware assisted blinking [ARM] Orion: GPIO support [ARM] Orion: programable address map support ... Conflicts: arch/arm/Kconfig arch/arm/Makefile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-28Merge branches 'at91', 'ep93xx', 'iop', 'kprobes', 'ks8695', 'misc', 'msm', ↵Russell King2-5/+33
's3c2410', 'sa1100' and 'vfp' into devel * at91: (24 commits) [ARM] 4615/4: sam926[13]ek buttons updated [ARM] 4765/1: [AT91] AT91CAP9A-DK board support [ARM] 4764/1: [AT91] AT91CAP9 core support [ARM] 4738/1: at91sam9261: Remove udc pullup enabling in board initialisation [ARM] 4761/1: [AT91] Board-support for NEW_LEDs [ARM] 4760/1: [AT91] SPI CS0 errata on AT91RM9200 [ARM] 4759/1: [AT91] Buttons on CSB300 [ARM] 4758/1: [AT91] LEDs [ARM] 4757/1: [AT91] UART initialization [ARM] 4756/1: [AT91] Makefile cleanup [ARM] 4755/1: [AT91] NAND update [ARM] 4754/1: [AT91] SSC library support [ARM] 4753/1: [AT91] Use DMA_BIT_MASK [ARM] 4752/1: [AT91] RTT, RTC and WDT peripherals on SAM9 [ARM] 4751/1: [AT91] ISI peripheral on SAM9263 [ARM] 4750/1: [AT91] STN LCD displays on SAM9261 [ARM] 4734/1: at91sam9263ek: include IRQ for Ethernet PHY [ARM] 4646/1: AT91: configurable HZ, default to 128 [ARM] 4688/1: at91: speed-up irq processing [ARM] 4657/1: AT91: Header definition update ... * ep93xx: [ARM] 4671/1: ep93xx: remove obsolete gpio_line_* operations [ARM] 4670/1: ep93xx: implement IRQT_BOTHEDGE gpio irq sense type [ARM] 4669/1: ep93xx: simplify GPIO code and cleanups [ARM] 4668/1: ep93xx: implement new GPIO API * iop: [ARM] 4770/1: GLAN Tank: correct physmap_flash_data width field [ARM] 4732/1: GLAN Tank: register rtc-rs5c372 i2c device [ARM] 4708/1: iop: update defconfigs for 2.6.24 * kprobes: ARM kprobes: let's enable it ARM kprobes: special hook for the kprobes breakpoint handler ARM kprobes: prevent some functions involved with kprobes from being probed ARM kprobes: don't let a single-stepped stmdb corrupt the exception stack ARM kprobes: add the kprobes hook to the page fault handler ARM kprobes: core code ARM kprobes: instruction single-stepping support * ks8695: [ARM] 4603/1: KS8695: debugfs interface to view pin state [ARM] 4601/1: KS8695: PCI support * misc: [ARM] remove duplicate includes [ARM] CONFIG_DEBUG_STACK_USAGE [ARM] 4689/1: small comment wrap fix [ARM] 4687/1: Trivial arch/arm/kernel/entry-common.S comment fix [ARM] 4666/1: ixp4xx: fix sparse warnings in include/asm-arm/arch-ixp4xx/io.h [ARM] remove reference to non-existent MTD_OBSOLETE_CHIPS [SERIAL] 21285: Report baud rate back via termios [ARM] Remove pointless casts from void pointers, [ARM] Misc minor interrupt handler cleanups [ARM] Remove at91_lcdc.h [ARM] ARRAY_SIZE() cleanup [ARM] Update mach-types * msm: [ARM] msm: dma support for MSM7X00A [ARM] msm: board file for MACH_HALIBUT (QCT MSM7200A) [ARM] msm: irq and timer support for ARCH_MSM7X00A [ARM] msm: core platform support for ARCH_MSM7X00A * s3c2410: (33 commits) [ARM] 4795/1: S3C244X: Add armclk and setparent call [ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code [ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function [ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S [ARM] 4791/1: S3C2412: Make fclk a parent of msysclk [ARM] 4790/1: S3C2412: Fix parent selection for msysclk. [ARM] 4789/1: S3C2412: Add missing CLKDIVN register values [ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used. [ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number [ARM] 4786/1: S3C2412: Add SPI FIFO controll constants [ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers [ARM] 4784/1: S3C24XX: Fix GPIO restore glitches [ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull() [ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users [ARM] 4781/1: S3C24XX: DMA suspend and resume support [ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX [ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call [ARM] 4778/1: S3C2412: Add armclk and init from DVS state [ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk [ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected ... * sa1100: [ARM] sa1100: add clock source support * vfp: [ARM] 4584/2: ARMv7: Add Advanced SIMD (NEON) extension support [ARM] 4583/1: ARMv7: Add VFPv3 support [ARM] 4582/2: Add support for the common VFP subarchitecture
2008-01-26ARM kprobes: prevent some functions involved with kprobes from being probedNicolas Pitre1-2/+2
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26ARM kprobes: add the kprobes hook to the page fault handlerNicolas Pitre1-0/+27
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26[ARM] Feroceon: support old cores with ARM926 IDTzachi Perelstein2-0/+36
This enables the usage of some old Feroceon cores for which the CPU ID is equal to the ARM926 ID. Relevant for Feroceon-1850 and old Feroceon-2850. Signed-off-by: Tzachi Perelstein <tzachi@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] Marvell Feroceon CPU core supportAssaf Hoffman3-2/+494
The Feroceon is a family of independent ARMv5TE compliant CPU core implementations, supporting a variable depth pipeline and out-of-order execution. The Feroceon is configurable with VFP support, and the later models in the series are superscalar with up to two instructions per clock cycle. This patch adds the initial low-level cache/TLB handling for this core. Signed-off-by: Assaf Hoffman <hoffman@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] 4764/1: [AT91] AT91CAP9 core supportAndrew Victor1-2/+2
Add support for Atmel's AT91CAP9 Customizable Microcontroller family. <http://www.atmel.com/products/AT91CAP/Default.asp> Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26[ARM] msm: core platform support for ARCH_MSM7X00ABrian Swetland1-1/+2
- core header files for arch-msm - Kconfig and Makefiles to enable ARCH_MSM7X00A builds - MSM7X00A specific arch_idle - peripheral iomap and irq number definitions Signed-off-by: Brian Swetland <swetland@google.com>
2007-11-11[ARM] remove useless setting of VM_RESERVEDRussell King1-1/+0
remap_pfn_range() takes care of setting the appropriate VM_* flags itself; there's no need for callers of remap_pfn_range() to set VM_RESERVED before it is called. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-31[ARM] Fix FIQ issue with ARM926Russell King1-0/+4
Jon Eibertzon writes: > We have noticed that the I-cache is disabled while waiting for > interrupt in cpu_arm926_do_idle in arch/arm/mm/proc-arm926.S > and we are curious to know why, because this causes us a great > performance hit when executing in FIQ-handlers. Is it assumed > here that every individual FIQ-handler re-enables the I-cache? The I-cache disable is an errata workaround, so the solution is to disable FIQs across the section with the I-cache disabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-19Use helpers to obtain task pid in printks (arch code)Alexey Dobriyan1-1/+1
One of the easiest things to isolate is the pid printed in kernel log. There was a patch, that made this for arch-independent code, this one makes so for arch/xxx files. It took some time to cross-compile it, but hopefully these are all the printks in arch code. Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Signed-off-by: Pavel Emelyanov <xemul@openvz.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19pid namespaces: define is_global_init() and is_container_init()Serge E. Hallyn1-1/+1
is_init() is an ambiguous name for the pid==1 check. Split it into is_global_init() and is_container_init(). A cgroup init has it's tsk->pid == 1. A global init also has it's tsk->pid == 1 and it's active pid namespace is the init_pid_ns. But rather than check the active pid namespace, compare the task structure with 'init_pid_ns.child_reaper', which is initialized during boot to the /sbin/init process and never changes. Changelog: 2.6.22-rc4-mm2-pidns1: - Use 'init_pid_ns.child_reaper' to determine if a given task is the global init (/sbin/init) process. This would improve performance and remove dependence on the task_pid(). 2.6.21-mm2-pidns2: - [Sukadev Bhattiprolu] Changed is_container_init() calls in {powerpc, ppc,avr32}/traps.c for the _exception() call to is_global_init(). This way, we kill only the cgroup if the cgroup's init has a bug rather than force a kernel panic. [akpm@linux-foundation.org: fix comment] [sukadev@us.ibm.com: Use is_global_init() in arch/m32r/mm/fault.c] [bunk@stusta.de: kernel/pid.c: remove unused exports] [sukadev@us.ibm.com: Fix capability.c to work with threaded init] Signed-off-by: Serge E. Hallyn <serue@us.ibm.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com> Acked-by: Pavel Emelianov <xemul@openvz.org> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Cedric Le Goater <clg@fr.ibm.com> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Herbert Poetzel <herbert@13thfloor.at> Cc: Kirill Korotaev <dev@sw.ru> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-16During VM oom condition, kill all threads in process groupWill Schmidt1-1/+1
We have had complaints where a threaded application is left in a bad state after one of it's threads is killed when we hit a VM: out_of_memory condition. Killing just one of the process threads can leave the application in a bad state, whereas killing the entire process group would allow for the application to restart, or be otherwise handled, and makes it very obvious that something has gone wrong. This change allows the entire process group to be taken down, rather than just the one thread. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ian Molton <spyro@f2s.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Andi Kleen <ak@suse.de> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Richard Curnow <rc@rc0.org.uk> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-15Merge branch 'pxa' into develRussell King1-2/+2
2007-10-15[ARM] pxa: PXA3xx base supporteric miao1-1/+1
Signed-off-by: eric miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-12[ARM] Rename consistent_sync() as dma_cache_maint()Russell King1-2/+2
consistent_sync() is used to handle the cache maintainence issues with DMA operations. Since we've now removed the misuse of this function from the two MTD drivers, rename it to prevent future mis-use. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-12[ARM] pxa: Make CPU_XSCALE depend on PXA25x or PXA27xRussell King1-1/+1
PXA3 SoCs are supported by the Xscale3 CPU code rather than the Xscale CPU code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-09-17[ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addressesRui Sousa1-1/+11
The l2x0_inv_range() function doesn't handle unaligned addresses correctly. It's necessary to clean the cache lines that are at the start and end of the invalidate range, if the addresses are not aligned, to prevent corruption of other data sharing the same cache line. Signed-off-by: Rui Sousa <rui.p.m.sousa@gmail.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-22Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds5-35/+38
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (60 commits) [ARM] 4524/1: S3C: Move register out of include/asm-arm/arch-s3c2410 [ARM] 4523/1: S3C: Remove FIFO_MAX from uncompression headers [ARM] 4522/1: S3C: split include/asm-arm/arch/memory.h [ARM] 4521/2: S3C: Reorganise VA mapping headers [ARM] 4520/1: S3C: Remove old VA values from static map [ARM] 4519/1: S3C: split S3C2400 values out of S3C24XX map.h [ARM] 4518/1: S3C: Rename watchdog configuration options [ARM] 4517/1: S3C: Fix debug macros for ARM926 output [ARM] 4516/1: S3C: Fix uncompressor serial output for ARM926 [ARM] 4515/1: S3C: Move uncompress code to plat-s3c [ARM] 4514/1: S3C: Rename DEBUG_S3C2410_PORT and DEBUG_S3C_UART [ARM] 4513/1: S3C: Rename CONFIG_S3C2410_LOWLEVEL_UART_PORT [ARM] 4512/1: S3C: rename the debug macros for per-cpu updates [ARM] 4511/1: S3C: updated LLSERIAL Kconfig defines for CPU support [ARM] 4510/1: S3C: split debug-macro support into plat-s3c [ARM] 4509/1: S3C: Create initial arch/arm/plat-s3c [ARM] 4508/1: S3C: Move items to include/asm-arm/plat-s3c [ARM] 4461/1: MXC platform and i.MX31ADS core support [ARM] 4507/1: pxa2xx clock_event_device [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later ...
2007-07-22Merge branches 'at91', 'imx', 'iop', 'ixp', 'ks8695', 'misc', 'ns9xxx', ↵Russell King5-35/+38
'pxa' and 's3c' into devel
2007-07-22[ARM] 4461/1: MXC platform and i.MX31ADS core supportQuinn Jensen1-2/+3
This patch adds the foundation pieces for the Freescale MXC platforms, including i.MX2 and i.MX3 based systems. The bare-bones MX31 support in this patch boots to the rootdev panic with 8250 serial console configured "console=ttyS0,115200". It assumes that Redboot is the boot loader. Signed-off-by: Quinn Jensen <quinn.jensen@freescale.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4497/1: Only allow safe cache configurations on ARMv6 and laterCatalin Marinas2-5/+11
Currently, Linux doesn't generate correct page tables for ARMv6 and later cores if the cache policy is different from the default one (it may lead to strongly ordered or shared device mappings). This patch disallows cache policies other than writeback and the CPU_[ID]CACHE_DISABLE options only affect the CP15 system control register rather than the page tables. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4503/1: nommu: Add noMMU support for ARMv7Catalin Marinas2-12/+15
This patch adds the necessary ifdef's to the proc-v7.S code and defines the v7wbi_tlb_fns macro in pgtable-nommu.h Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4498/1: ARMv7: Remove the L2 cache configuration via the aux ctrl registerCatalin Marinas2-16/+0
The auxiliary control and the L2 auxiliary control registers are Cortex-A8 specific. They need to be removed from the generic ARMv7 support code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4504/1: nommu: Fix the ARMv6 support for MMU-less platformsCatalin Marinas1-1/+1
With this patch, Kconfig only selects CPU_HAS_ASID for the MMU case. It also corrects the typo in the v6wbi_tlb_fns definition in pgtable-nommu.h. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4502/1: nommu: Do not export the copy/clear user page functionsCatalin Marinas1-0/+2
The __cpu_{clear|copy}_user_page functions are not defined for the MMU-less case and therefore should not be exported. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4501/1: nommu: Select TLS register emulation if ARMv6 and not v6KCatalin Marinas1-0/+1
If not MMU and not v6K, access to the TLS register has to be emulated. MMU-less systems do not provide a high page for kuser helpers. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20[ARM] 4500/1: Add locking around the background L2x0 cache operationsCatalin Marinas1-0/+6
The background operations of the L2x0 cache controllers are aborted if another operation is issued on the same or different core. This patch protects the maintenance operation issuing/polling with a spinlock. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20arm: fix up handle_mm_fault changesNick Piggin1-3/+3
Update arm to use bitwise types for its VM_FAULT_ constants. Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-19mm: fault feedback #2Nick Piggin1-20/+16
This patch completes Linus's wish that the fault return codes be made into bit flags, which I agree makes everything nicer. This requires requires all handle_mm_fault callers to be modified (possibly the modifications should go further and do things like fault accounting in handle_mm_fault -- however that would be for another patch). [akpm@linux-foundation.org: fix alpha build] [akpm@linux-foundation.org: fix s390 build] [akpm@linux-foundation.org: fix sparc build] [akpm@linux-foundation.org: fix sparc64 build] [akpm@linux-foundation.org: fix ia64 build] Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ian Molton <spyro@f2s.com> Cc: Bryan Wu <bryan.wu@analog.com> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Matthew Wilcox <willy@debian.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Richard Curnow <rc@rc0.org.uk> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Cc: Chris Zankel <chris@zankel.net> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> [ Still apparently needs some ARM and PPC loving - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12[ARM] Fix bounding error in ioremap_pfn()Russell King1-6/+4
If size=16M offset=2K then we should map two supersections rather than just one. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-04[ARM] Fix non-page aligned boot time mappingsRussell King1-2/+2
AT91SAM9260 stopped booting with the recent changes to MM initialisation - it was asking for a non-aligned virtual address which caused loops to be non-terminal. Fix this by rounding virtual addresses down, but remember to include the offset in the length, and round the length up to the following page. This means that asking for a mapping of 4K starting at 2K into a page maps two pages as one would expect. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-01parse errors in ifdefsYoann Padioleau1-1/+1
Fix various bits of obviously-busted code which we're not happening to compile, due to ifdefs. Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jeff Garzik <jeff@garzik.org> Cc: Jan Kara <jack@ucw.cz> Cc: James Bottomley <James.Bottomley@steeleye.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-30[ARM] 4394/1: ARMv7: Add the TLB range operationsCatalin Marinas4-2/+94
We are currently using the ARMv6 operations but need to duplicate some of the code because of the introduction of the new CPU barrier instructions in ARMv7. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-21Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds4-3/+11
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits) [ARM] spelling fixes [ARM] at91_adc parenthesis balance [ARM] 4400/1: S3C24XX: Add high-speed MMC device definition [ARM] 4399/2: S3C2443: Fix SMDK2443 nand timings [ARM] 4398/1: S3C2443: Fix watchdog IRQ number [ARM] 4397/1: S3C2443: remove SDI0/1 IRQ ambiguity [ARM] 4396/1: S3C2443: Add missing HCLK clocks [ARM] 4395/1: S3C24XX: add include of <linux/sysdev.h> to relevant machines [ARM] 4388/1: no need for arm/mm mmap range checks for non-mmu [ARM] 4387/1: fix /proc/cpuinfo formatting for pre-ARM7 parts [ARM] ARMv6: add CPU_HAS_ASID configuration [ARM] integrator: fix pci_v3 compile error with DEBUG_LL [ARM] gic: Fix gic cascade irq handling [ARM] Silence OMAP kernel configuration warning [ARM] Update ARM syscalls [ARM] 4384/1: S3C2412/13 SPI registers offset correction [ARM] 4383/1: iop: fix usage of '__init' and 'inline' in iop files [ARM] 4382/1: iop13xx: fix msi support [ARM] Remove Integrator/CP SMP platform support [ARM] 4378/1: KS8695: Serial driver fix ...
2007-05-21Detach sched.h from mm.hAlexey Dobriyan1-1/+1
First thing mm.h does is including sched.h solely for can_do_mlock() inline function which has "current" dereference inside. By dealing with can_do_mlock() mm.h can be detached from sched.h which is good. See below, why. This patch a) removes unconditional inclusion of sched.h from mm.h b) makes can_do_mlock() normal function in mm/mlock.c c) exports can_do_mlock() to not break compilation d) adds sched.h inclusions back to files that were getting it indirectly. e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were getting them indirectly Net result is: a) mm.h users would get less code to open, read, preprocess, parse, ... if they don't need sched.h b) sched.h stops being dependency for significant number of files: on x86_64 allmodconfig touching sched.h results in recompile of 4083 files, after patch it's only 3744 (-8.3%). Cross-compile tested on all arm defconfigs, all mips defconfigs, all powerpc defconfigs, alpha alpha-up arm i386 i386-up i386-defconfig i386-allnoconfig ia64 ia64-up m68k mips parisc parisc-up powerpc powerpc-up s390 s390-up sparc sparc-up sparc64 sparc64-up um-x86_64 x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig as well as my two usual configs. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-20[ARM] spelling fixesSimon Arlott3-3/+3
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-17[ARM] ARMv6: add CPU_HAS_ASID configurationRussell King1-0/+8
Presently, we check for the minimum ARM architecture that we're building for to determine whether we need ASID support. This is wrong - if we're going to support a range of CPUs which include ARMv6 or higher, we need the ASID. Convert the checks to use a new configuration symbol, and arrange for ARMv6 and higher CPU entries to select it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-11[ARM] 4331/3: Support for Micrel/Kendin KS8695 processorAndrew Victor1-3/+3
Add core support for the Kendin/Micrel KS8695 processor family. It is an ARM922-T based SoC with integrated USART, 4-port Ethernet Switch, WAN Ethernet port, and optional PCI Host bridge, etc. http://www.micrel.com/page.do?page=product-info/sys_on_chip.jsp This patch is based on earlier patches from Lennert Buytenhek, Ben Dooks and Greg Ungerer posted to the arm-linux-kernel mailing list in March 2006; and Micrel's 2.6.9 port. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-11[ARM] 4370/3: AT91: Support for Atmel AT91SAM9RL processors.Andrew Victor1-2/+2
Add support for Atmel's new AT91SAM9RL range of processors. Includes similar peripherals as other AT91SAM9 processors, but with a High-speed USB controller and various sizes of internal SRAM. Signed-off-by: Nicolas Ferre <nicolas.ferre@rfo.atmel.com> Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-11[ARM] 4303/3: base kernel support for TI DaVinciKevin Hilman1-2/+2
Add base kernel support for the TI DaVinci platform. This patch only includes interrupts, timers, CPU identification, serial support and basic power and sleep controller init. More drivers to come. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-09Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds7-5/+606
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (28 commits) ARM: OMAP: Fix GCC-reported compile time bug ARM: OMAP: restore CONFIG_GENERIC_TIME ARM: OMAP: partial LED fixes ARM: OMAP: add SoSSI clock (call propagate_rate for childrens) ARM: OMAP: FB sync with N800 tree (support for dynamic SRAM allocations) ARM: OMAP: Sync framebuffer headers with N800 tree ARM: OMAP: Mostly cosmetic to sync up with linux-omap tree ARM: OMAP: Fix gpmc header ARM: OMAP: Add mailbox support for IVA [ARM] armv7: add Makefile and Kconfig entries [ARM] armv7: add support for asid-tagged VIVT I-cache [ARM] armv7: add dedicated ARMv7 barrier instructions [ARM] armv7: Add ARMv7 cacheid macros [ARM] armv7: add support for ARMv7 cores. [ARM] Fix ARM branch relocation range [ARM] 4363/1: AT91: Remove legacy PIO definitions [ARM] 4361/1: AT91: Build error ARM: OMAP: Sync core code with linux-omap ARM: OMAP: Sync headers with linux-omap ARM: OMAP: h4 must have blinky leds!! ...
2007-05-09Merge branches 'armv7', 'at91', 'misc' and 'omap' into develRussell King1-3/+7
2007-05-09[ARM] armv7: add Makefile and Kconfig entriesCatalin Marinas2-2/+33
This patch adds the necessary lines to the Makefile and Kconfig files for enabling the compilation of the ARMv7 CPU support. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-09[ARM] armv7: add support for asid-tagged VIVT I-cacheCatalin Marinas1-0/+7
ARMv7 can have VIPT, PIPT or ASID-tagged VIVT I-cache. This patch adds the necessary invalidation of the I-cache when the ASID numbers are re-used. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-08[ARM] armv7: add support for ARMv7 cores.Catalin Marinas4-0/+559
This patch adds support for the ARMv7 cores. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-08[ARM] Fix ASID version switchRussell King1-3/+7
Close a hole in the ASID version switch, particularly the following scenario: CPU0 MM PID CPU1 MM PID idle A pid(A) A idle(lazy tlb) * new asid version triggered by B * B pid(B) A pid(A) * MM A gets new asid version * A idle(lazy tlb) A pid(A) * CPU1 doesn't see the new ASID * The result is that CPU1 continues running with the hardware set for the original (stale) ASID value, but mm->context.id contains the new ASID value. The result is that the next MM fault on CPU1 updates the page table entries, but flush_tlb_page() fails due to wrong ASID. There is a related case with a threaded application is allocated a new ASID on one CPU while another of its threads is running on some different CPU. This scenario is not fixed by this commit. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-08move die notifier handling to common codeChristoph Hellwig1-1/+1
This patch moves the die notifier handling to common code. Previous various architectures had exactly the same code for it. Note that the new code is compiled unconditionally, this should be understood as an appel to the other architecture maintainer to implement support for it aswell (aka sprinkling a notify_die or two in the proper place) arm had a notifiy_die that did something totally different, I renamed it to arm_notify_die as part of the patch and made it static to the file it's declared and used at. avr32 used to pass slightly less information through this interface and I brought it into line with the other architectures. [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: fix vmalloc_sync_all bustage] [bryan.wu@analog.com: fix vmalloc_sync_all in nommu] Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: <linux-arch@vger.kernel.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07get_unmapped_area handles MAP_FIXED on armBenjamin Herrenschmidt1-2/+1
ARM already had a case for MAP_FIXED in arch_get_unmapped_area() though it was not called before. Fix the comment to reflect that it will now be called. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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