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2016-04-26ARM: vexpress/mps2: introduce MPS2 platformVladimir Murzin1-0/+3
The Cortex-M Prototyping System (or V2M-MPS2) is designed for prototyping and evaluation Cortex-M family of processors including the latest Cortex-M7 It comes with a range of useful peripherals including 8MB single cycle SRAM, 16MB PSRAM, Ethernet, QSVGA touch screen panel, 4bit RGB VGA connector, Audio, SPI and GPIO. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2012-09-14ARM: vexpress: convert to multi-platformRob Herring1-5/+0
Convert vexpress to multi-platform. This always enables vexpress DT and makes it the default v7 platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com>
2012-09-14ARM: move all dtb targets out of Makefile.bootRob Herring1-5/+0
In preparation to support multi-platform kernels, move all the dtb targets out of the mach Makefile.boot and into the arch/arm/boot/dts/Makefile which is closer to the sources. DTBs are only built when CONFIG_OF is enabled and now use top level CONFIG_ARCH_xxx instead of chip or board specific config options. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
2012-07-13ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tilePawel Moll1-1/+2
This patch adds Device Tree file for the CoreTile Express A15x2 A7x3 (V2P-CA15_CA7). Note that the A7 cpu nodes are commented out, as the big.LITTLE-relevant patches are not upstreamed yet. Till this time one can use the board with two A15 cores only, keeping the A7s in reset by adding the following setting to the board.txt file in Versatile Express configuration tree: SCC: 0x018 0x00001FFF Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-02-24ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)Pawel Moll1-1/+2
This patch adds Device Tree file for the CoreTile Express A15x2 (V2P-CA15) with Test Chip 1. As the chip's GIC has 160 interrupt inputs and equivalent SMM (FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is increased. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-02-24ARM: vexpress: Add Device Tree for V2P-CA9 core tilePawel Moll1-1/+2
This patch adds Device Tree file for the CoreTile Express A9x4 (V2P-CA9). Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-02-24ARM: vexpress: Add Device Tree for V2P-CA5s core tilePawel Moll1-0/+2
This patch adds Device Tree file for the CoreTile Express A5x2 (V2P-CA5s). Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-02-24ARM: vexpress: Add Device Tree supportPawel Moll1-0/+2
This patch adds generic Versatile Express DT machine description, Device Tree description for the motherboard and documentation for the bindings. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2011-10-17ARM: 7022/1: allow to detect conflicting zreladdrsSascha Hauer1-1/+1
Boards used to specify zreladdr in their Makefile.boot with zreladdr-y := x, so conflicting zreladdrs were silently overwritten. This patch changes this to zreladdr-y += x, so that we end up with multiple words in zreladdr in such a case. We can detect this later and complain if necessary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02ARM: Add Versatile Express supportRussell King1-0/+3
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>