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2018-07-20ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15Geert Uytterhoeven4-13/+2
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers. Force use of the ARM architectured timer on these SoCs. This allows to: - Remove the calls to shmobile_init_delay() from the corresponding machine vectors, - Remove a check in timer setup specific to R-Car Gen2, - Remove a check in shmobile_init_delay(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_killArnd Bergmann1-11/+11
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning without CONFIG_HOTPLUG_CPU: arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function] This moves the function inside of that #ifdef to avoid the warning. Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-27ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMPGeert Uytterhoeven2-3/+1
As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use cntvoff"), there's no non-SMP code left in headsmp-apmu.S. Hence build the file for SMP only, and drop the no longer needed check for CONFIG_SMP inside the file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: convert to SPDX identifierWolfram Sang13-107/+13
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7779: Remove explicit SYSC config and initGeert Uytterhoeven4-46/+1
If the R-Car H1 system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a7779-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old DTBs predating commit b2df3aa487395a1b ("ARM: dts: r8a7779: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After stopping powering down secondary CPUs during early boot, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car H1 platform code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()Geert Uytterhoeven1-41/+6
The r8a7779 SMP code calls rcar_sysc_power_{down,up}() to control power to the SYSC power areas containing CPUs. This requires passing full CPU power area parameter blocks. Migrate the code to call the new rcar_sysc_power_{down,up}_cpu() helpers, which just take a CPU index, and use the SYSC power area definitions from the r8a7779-sysc driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early bootGeert Uytterhoeven1-5/+0
At .smp_prepare_cpus() time, CPUs 1-3 are still powered down: - The bootloader doesn't enable CPUs 1-3, - Non-boot CPUs are disabled by kexec before starting the new kernel. Hence there is no need to try to power them down again, as it will fail silently with -EIO anyway. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: rcar-gen2: Remove explicit SYSC config and initGeert Uytterhoeven1-25/+0
If the R-Car system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a779*-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old R-Car H2 and M2-W DTBs predating commit 8574de861978d518 ("ARM: dts: r8a7791: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After the removal of the legacy SMP fallbacks, which powered up the SCUs explicitly, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car Gen2 platform code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: apmu: Remove platsmp-apmu.hGeert Uytterhoeven2-124/+100
After the removal of the legacy SMP fallbacks, platsmp-apmu.h is no longer needed outside platsmp-apmu.c. Hence remove platsmp-apmu.h, and make the functions exported previously static. As the header file also provided forward declarations, the code in platsmp-apmu.c must be reshuffled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus()Geert Uytterhoeven2-48/+0
After the removal of the legacy SMP fallbacks, there are no more users left of shmobile_smp_apmu_prepare_cpus(). Remove it, together with the legacy SMP config parser. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND sectionGeert Uytterhoeven1-15/+15
cpu_leave_lowpower() is used for suspend only, not for CPU hotplug. Hence move it from the HOTPLUG_CPU || SUSPEND section to the SUSPEND section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()Geert Uytterhoeven2-10/+0
shmobile_smp_init_fallback_ops() became unused after removing SoC-specific machine definitions that provided legacy SMP initialization fallbacks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definitionGeert Uytterhoeven3-42/+1
Now r8a7791 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7791-specific one can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7791: Remove legacy SMP fallback codeGeert Uytterhoeven4-63/+0
As of commit f89a51700d7ae0ef ("ARM: shmobile: r8a7791: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definitionGeert Uytterhoeven3-38/+2
Now r8a7790 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7790-specific one can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18ARM: shmobile: r8a7790: Remove legacy SMP fallback codeGeert Uytterhoeven4-81/+0
As of commit f5d70b9cee2282ec ("ARM: shmobile: r8a7790: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-11Merge tag 'armsoc-soc' of ↵Linus Torvalds4-23/+18
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Here are the main updates for SoC support (besides DT additions) for ARM 32- and 64-bit platforms. The branch also contains defconfig updates to turn on drivers and options as needed on the various platforms. The largest parts of the delta are from cleanups moving platform data and board file setup of TI platforms to ti-sysc bus drivers. There are also some sweeping changes of eeprom and nand setup on Davinci, i.MX and other platforms. Samsung is removing support for Exynos5440, which was an oddball SoC that hasn't been seen much use in designs. Renesas is adding support for new SoCs (R-Car E3, RZ/G1C and RZ/N1D). Linus Walleij is also removing support for ux500 (Sony Ericsson) U8540/9540 SoCs that never made it to significant mass production and products" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) MAINTAINERS: add NXP linux team maillist as i.MX reviewer ARM: stm32: Don't select DMA unconditionally on STM32MP157C arm64: defconfig: Enable PCIe on msm8996 and db820c ARM: pxa3xx: enable external wakeup pins ARM: pxa: stargate2: use device properties for at24 eeprom arm64: defconfig: Enable HISILICON_LPC arm64: defconfig: enable drivers for Poplar support arm64: defconfig: Enable UFS on msm8996 ARM: berlin: switch to SPDX license identifier arm: berlin: remove non-necessary flush_cache_all() ARM: berlin: extend BG2CD Kconfig entry OMAP: CLK: CLKSRC: Add suspend resume hooks ARM: AM43XX: Add functions to save/restore am43xx control registers ASoC: ams_delta: use GPIO lookup table ARM: OMAP1: ams-delta: add GPIO lookup tables bus: ti-sysc: Fix optional clocks array access ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore ...
2018-05-26Merge tag 'renesas-soc-for-v4.18' of ↵Olof Johansson2-0/+15
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Renesas ARM Based SoC Updates for v4.18 * SoC - Change platform dependency to ARCH_RENESAS This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near future. - Add the to Kconfig RZ/N1D (r9a06g032) SoC - Identify R-Car E3 (r8a77990) SoC - Identify and add minimal support for RZ/G1C (r8a77470) SoC * R-Car SYSC - Add support for R-Car E3 (r8a77990) SoC - Remove unused inclusion of <linux/sys_soc.h>, - Make r8a77995_areas[] const. * R-Car Reset - Add support for R-Car E3 (r8a77990) SoC * Debug-LL - Add support for RZ/G1C (r8a77470) SoC * tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B} soc: renesas: rcar-sysc: Add support for R-Car E3 power areas arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig arm: shmobile: Change platform dependency to ARCH_RENESAS soc: renesas: r8a77995-sysc: Cleanups soc: renesas: rcar-rst: Add support for R-Car E3 soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions soc: renesas: identify R-Car E3 ARM: debug-ll: Add support for r8a77470 ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig ARM: shmobile: r8a77470: basic SoC support soc: renesas: rcar-sysc: Add r8a77470 support soc: renesas: rcar-rst: Add support for RZ/G1C soc: renesas: Identify RZ/G1C Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-09arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/KconfigChristoph Hellwig1-1/+0
Define this symbol if the architecture either uses 64-bit pointers or the PHYS_ADDR_T_64BIT is set. This covers 95% of the old arch magic. We only need an additional select for Xen on ARM (why anyway?), and we now always set ARCH_DMA_ADDR_T_64BIT on mips boards with 64-bit physical addressing instead of only doing it when highmem is set. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: James Hogan <jhogan@kernel.org>
2018-05-08ARM: shmobile: Convert file to use cntvoffMylène Josserand3-23/+3
Now that a common function is available for CNTVOFF's initialization, let's convert shmobile-apmu code to use this function. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-23arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile KconfigMichel Pollet1-0/+4
Add the RZ/N1D SoC to the reset of the Renesas SoC Collection. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16ARM: shmobile: Add the RZ/N1 arch to the shmobile KconfigMichel Pollet1-0/+5
Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of the Renesas SoC collection. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16ARM: shmobile: r8a77470: basic SoC supportBiju Das2-0/+6
Add minimal support for the RZ/G1C (R8A77470) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13ARM: shmobile: rcar-gen2: Add watchdog supportFabrizio Castro2-3/+13
This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-03-13ARM: shmobile: Add watchdog supportFabrizio Castro2-0/+59
On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non boot CPUs run a routine designed to bring up SMP and deal with hot plug. The value contained in the SBAR registers is not initialized by a WDT triggered reset, which means that after a WDT triggered reset we jump to the SMP bring up routine, preventing the system from executing the bootrom code. The purpose of this patch is to jump to the bootrom code in case of a WDT triggered reset, and keep the SMP functionality untouched. In order to tell if the code had been called due to the WDT overflowing we are testing WOVF from register RWTCSRA. The new function shmobile_boot_vector_gen2 isn't replacing shmobile_boot_vector for backward compatibility reasons. The kernel will install the best option (either shmobile_boot_vector or shmobile_boot_vector_gen2) to ICRAM1 after parsing the device tree, according to the amount of memory available. Since shmobile_boot_vector has become bigger, "reg" property of nodes compatible with "renesas,smp-sram" now need to be set to a value greater or equal to "<0 0x60>". Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: dropped #ifdef from common.h] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-28ARM: shmobile: rcar-gen2: Fix error check in regulator quirkGeert Uytterhoeven1-1/+1
On systems with two regulators, a bogus error message is printed on success: i2c 6-0058: i2c error 2 While adding support for Stout, the number of messages to send was made variable, but the corresponding return value check of i2c_transfer() wasn't updated. Fixes: ff938cd14d67a704 ("ARM: shmobile: stout: enable R-Car Gen2 regulator quirk") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21ARM: shmobile: stout: enable R-Car Gen2 regulator quirkMarek Vasut1-7/+16
Regulator setup is suboptimal on H2 Stout too. The Stout newly has two DA9210 regulators, so the quirk is extended to handle another DA9210 at i2c address 0x70. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-16Merge tag 'armsoc-soc' of ↵Linus Torvalds5-19/+45
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "Most of the commits are for defconfig changes, to enable newly added drivers or features that people have started using. For the changed lines lines, we have mostly cleanups, the affected platforms are OMAP, Versatile, EP93xx, Samsung, Broadcom, i.MX, and Actions. The largest single change is the introduction of the TI "sysc" bus driver, with the intention of cleaning up more legacy code. Two new SoC platforms get added this time: - Allwinner R40 is a modernized version of the A20 chip, now with a Quad-Core ARM Cortex-A7. According to the manufacturer, it is intended for "Smart Hardware" - Broadcom Hurricane 2 (Aka Strataconnect BCM5334X) is a family of chips meant for managed gigabit ethernet switches, based around a Cortex-A9 CPU. Finally, we gain SMP support for two platforms: Renesas R-Car E2 and Amlogic Meson8/8b, which were previously added but only supported uniprocessor operation" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits) ARM: multi_v7_defconfig: Select RPMSG_VIRTIO as module ARM: multi_v7_defconfig: enable CONFIG_GPIO_UNIPHIER arm64: defconfig: enable CONFIG_GPIO_UNIPHIER ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b ARM: meson: Add SMP bringup code for Meson8 and Meson8b ARM: smp_scu: allow the platform code to read the SCU CPU status ARM: smp_scu: add a helper for powering on a specific CPU dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation ARM: OMAP3: Delete an unnecessary variable initialisation in omap3xxx_hwmod_init() ARM: OMAP3: Use common error handling code in omap3xxx_hwmod_init() ARM: defconfig: select the right SX150X driver arm64: defconfig: Enable QCOM_IOMMU arm64: Add ThunderX drivers to defconfig arm64: defconfig: Enable Tegra PCI controller cpufreq: imx6q: Move speed grading check to cpufreq driver arm64: defconfig: re-enable Qualcomm DB410c USB ARM: configs: stm32: Add MDMA support in STM32 defconfig ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1 bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove bus: ti-sysc: mark PM functions as __maybe_unused ...
2017-11-13Merge branch 'pm-domains'Rafael J. Wysocki1-7/+1
* pm-domains: PM / Domains: Fix genpd to deal with drivers returning 1 from ->prepare() PM / domains: Rework governor code to be more consistent PM / Domains: Remove gpd_dev_ops.active_wakeup() callback soc: rockchip: power-domain: Use GENPD_FLAG_ACTIVE_WAKEUP soc: mediatek: Use GENPD_FLAG_ACTIVE_WAKEUP ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ACTIVE_WAKEUP PM / Domains: Allow genpd users to specify default active wakeup behavior PM / Domains: Add support to select performance-state of domains PM / Domains: Rename genpd internals from pm_genpd_* to genpd_*
2017-11-08ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ACTIVE_WAKEUPGeert Uytterhoeven1-7/+1
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to remove the driver's own "always true" callback. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman8-0/+8
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-11ARM: shmobile: rcar-gen2: fix non-SMP buildArnd Bergmann1-0/+2
A bugfix for the SMP case broke the build for the UP case: arch/arm/mach-shmobile/headsmp-apmu.o: In function `shmobile_boot_apmu': (.text+0x34): undefined reference to `secondary_startup' The assembler file mixes code that is used for SMP with code that we also need on a single-CPU build, so I'm leaving it always enabled in the Makefile, but enclose the SMP code in an #ifdef. Fixes: fd45a136ff6 ("ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18ARM: shmobile: rcar-gen2: Make sure CNTVOFF is initialized on CA7/15Geert Uytterhoeven5-19/+43
On Cortex-A7, the arch timer CNTVOFF register is uninitialized. Ideally it should be initialized by the boot loader, but it isn't. For the boot CPU, CNTVOFF is initialized by Linux since commit 9ce3fa6816c2fb59 ("ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794"). For secondary CPU cores, no such initialization is done. Hence when enabling SMP on r8a7794, the kernel log is spammed with: WARNING: Underflow in clocksource 'arch_sys_counter' observed, time update ignored. Please report this, consider using a different clocksource, if possible. Your kernel is probably still fine. As Marc Zyngier pointed out that Cortex-A15 and Cortex-A7 are similar with respect to CNTVOFF, we have been very lucky this just worked on R-Car Gen2 SoCs with Cortex-A15 cores. To fix this: - Move the existing inline asm code to initialize CNTVOFF to an assembler source file (adding comments and replacing hardcoded constants by definitions in the process), so it can be reused, - Perform the initialization of CNTVOFF on the boot CPU (Cortex-A15 or Cortex-A7) on all R-Car Gen2 and RZ/G1 parts, - Wrap the standard secondary_startup() routine inside a routine which initializes CNTVOFF. Based on patches by Hisashi Nakamura in the BSP. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-05Merge branch 'next/cleanup' into next/socOlof Johansson1-4/+3
* next/cleanup: soc: versatile: remove unnecessary static in realview_soc_probe() ARM: Convert to using %pOF instead of full_name ARM: hisi: Fix typo in comment ARM: OMAP4+: PRM: fix of_irq_get() result checks ARM: OMAP3+: PRM: fix of_irq_get() result check ARM: dts: dra72-evm-revc: workaround incorrect DP83867 RX_CTRL pin strap ARM: dts: dra71-evm: workaround incorrect DP83867 RX_CTRL pin strap ARM: OMAP2+: omap_device: drop broken RPM status update from suspend_noirq bus: omap-ocp2scp: Fix error handling in omap_ocp2scp_probe
2017-08-16Merge tag 'renesas-soc-for-v4.14' of ↵Arnd Bergmann3-11/+47
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Updates for v4.14" Simon Horman: * Add debug-ll support to RZ/G1M (r8a7743) SoC Chris Paterson says, "RZ/G1M uses SCIF0 for the debug console, like most of the R-Car Gen2 SoCs." * Remove ARCH_SHMOBILE_MULTI Geert Uytterhoeven says, "The migration from ARCH_SHMOBILE_MULTI to ARCH_RENESAS has been completed in v4.12..." * Correct arch timer frequency on RZ/G1M (r8a7743) SoC Geert Uytterhoeven says, "According to the datasheet, the frequency of the ARM architecture timer on RZ/G1E depends on the frequency of the ZS clock..." * Add support for CPG/MSSR bindings Geert Uytterhoeven says, "When using the new CPG/MSSR bindings, there is no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external clock crystal frequency falls back to a default of 20 MHz. While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this is not necessarily the case for out-of-tree third party boards. Add support for finding the external clock crystal oscillator on RZ/G1M, and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through the corresponding "renesas,r8a77xx-cpg-mssr" nodes." * Obtain jump stub region from DT Geert Uytterhoeven says, "Add support for obtaining from DT the SRAM region to store the jump stub for CPU core bringup, according to the renesas,smp-sram DT bindings." * tag 'renesas-soc-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Remove ARCH_SHMOBILE_MULTI ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings ARM: shmobile: rcar-gen2: Obtain jump stub region from DT ARM: debug-ll: Add support for r8a7743
2017-08-16ARM: Convert to using %pOF instead of full_nameRob Herring1-4/+3
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Cc: Russell King <linux@armlinux.org.uk> Cc: Kukjin Kim <kgene@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-04Merge tag 'renesas-fixes3-for-v4.13' of ↵Arnd Bergmann1-1/+5
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Pull "Third Round of Renesas ARM Based SoC Fixes for v4.13" from Simon Horman: Fix deadlock in regulator quirk for R-Car Gen 2 SoCs The da9063/da9210 regulator quirk for R-Car Gen2 boards uses a bus notifier, and unregisters the notifier when it is no longer needed. However, a notifier must not be unregistered from within the call chain. This bug went unnoticed, as blocking_notifier_chain_unregister() didn't take the semaphore during early boot. This is no longer the case as of upstream commit 1c3c5eab171590f8 ("sched/core: Enable might_sleep() and smp_processor_id() checks early") and a deadlock occurs. * tag 'renesas-fixes3-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: rcar-gen2: Fix deadlock in regulator quirk
2017-07-29ARM: shmobile: rcar-gen2: Fix deadlock in regulator quirkGeert Uytterhoeven1-1/+5
Simon Horman reported that Koelsch and Lager hang during boot, and bisected this to commit 1c3c5eab171590f8 ("sched/core: Enable might_sleep() and smp_processor_id() checks early"). The da9063/da9210 regulator quirk for R-Car Gen2 boards uses a bus notifier, and unregisters the notifier when it is no longer needed. However, a notifier must not be unregistered from within the call chain. This bug went unnoticed, as blocking_notifier_chain_unregister() didn't take the semaphore during early boot. The aforementioned commit changed that behavior, leading to a deadlock. Fix this by removing the call to bus_unregister_notifier(), and keeping local completion state instead. Reported-by: Simon Horman <horms+renesas@verge.net.au> Fixes: 663fbb52159cca6f ("ARM: shmobile: R-Car Gen2: Add da9063/da9210 regulator quirk") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: shmobile: Remove ARCH_SHMOBILE_MULTIGeert Uytterhoeven1-4/+0
The migration from ARCH_SHMOBILE_MULTI to ARCH_RENESAS has been completed in v4.12 by commit 9ed2d4bc5c0c244d ("ARM: dts: renesas: Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS"), so the ARCH_SHMOBILE_MULTI symbol can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1EGeert Uytterhoeven1-1/+2
According to the datasheet, the frequency of the ARM architecture timer on RZ/G1E depends on the frequency of the ZS clock, just like on R-Car E2 and V2H. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindingsGeert Uytterhoeven1-3/+15
When using the new CPG/MSSR bindings, there is no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain the external clock crystal frequency falls back to a default of 20 MHz. While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this is not necessarily the case for out-of-tree third party boards. Add support for finding the external clock crystal oscillator on RZ/G1M, and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through the corresponding "renesas,r8a77xx-cpg-mssr" nodes. Note that this is not needed on R-Car V2H and E2, and on RZ/G1E, as on those SoCs the arch_timer and generic counter clock is derived from the ZS clock instead. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: shmobile: rcar-gen2: Obtain jump stub region from DTGeert Uytterhoeven1-3/+30
Add support for obtaining from DT the SRAM region to store the jump stub for CPU core bringup, according to the renesas,smp-sram DT bindings. If no region is specified in DT, the code falls back to hardcoded ICRAM1 as before, to maintain backwards compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-04Merge tag 'armsoc-soc' of ↵Linus Torvalds1-15/+4
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ...
2017-06-14clocksource/drivers: Rename clocksource_probe to timer_probeDaniel Lezcano1-1/+1
The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ONGeert Uytterhoeven1-15/+4
Improve handling of always-on PM domains by using the GENPD_FLAG_ALWAYS_ON flag introduced in commit ffaa42e8a40b7f10 ("PM / Domains: Enable users of genpd to specify always on PM domains"). Note that the PM domain containing the serial console is still handled locally. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-17ARM: 8660/1: shmobile: r7s72100: Enable L2 cacheChris Brandt1-0/+2
Even though L2C is specified in the DT, you still need to add the aux settings in the machine_desc. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-02-28Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2-5/+5
Pull ARM updates from Russell King: - nommu updates from Afzal Mohammed cleaning up the vectors support - allow DMA memory "mapping" for nommu Benjamin Gaignard - fixing a correctness issue with R_ARM_PREL31 relocations in the module linker - add strlen() prototype for the decompressor - support for DEBUG_VIRTUAL from Florian Fainelli - adjusting memory bounds after memory reservations have been registered - unipher cache handling updates from Masahiro Yamada - initrd and Thumb Kconfig cleanups * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (23 commits) ARM: mm: round the initrd reservation to page boundaries ARM: mm: clean up initrd initialisation ARM: mm: move initrd init code out of arm_memblock_init() ARM: 8655/1: improve NOMMU definition of pgprot_*() ARM: 8654/1: decompressor: add strlen prototype ARM: 8652/1: cache-uniphier: clean up active way setup code ARM: 8651/1: cache-uniphier: include <linux/errno.h> instead of <linux/types.h> ARM: 8650/1: module: handle negative R_ARM_PREL31 addends correctly ARM: 8649/2: nommu: remove Hivecs configuration is asm ARM: 8648/2: nommu: display vectors base ARM: 8647/2: nommu: dynamic exception base address setting ARM: 8646/1: mmu: decouple VECTORS_BASE from Kconfig ARM: 8644/1: Reduce "CPU: shutdown" message to debug level ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL ARM: 8639/1: Define KERNEL_START and KERNEL_END ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_ ARM: 8637/1: Adjust memory boundaries after reservations ARM: 8636/1: Cleanup sanity_check_meminfo ARM: add CPU_THUMB_CAPABLE to indicate possible Thumb support ...
2017-02-28ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbolFlorian Fainelli2-5/+5
All low-level PM/SMP code using virt_to_phys() should actually use __pa_symbol() against kernel symbols. Update code where relevant to move away from virt_to_phys(). Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2017-02-23Merge tag 'armsoc-soc' of ↵Linus Torvalds5-61/+54
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "In the SoC branch we normally collect classic arch/arm/mach-* contents, i.e. C code changes for SoC platforms. This release cycle the diffstat is quite nice, in that we're removing 3x the amount of code that's being added. The main reason for this is that there's a removal of camera drivers for Freescale i.MX chips (driver was removed so the device registration isn't needed any more). There's also removal of display initialization code for OMAP that is no longer needed. The rest are mostly minor tweaks and cleanups; constification on Samsung platforms, cleanup of ux500 platform data, purge of other unused platform data/device seutp on i.MX and other good stuff. New SoC support this cycle is for two Allwinner platforms, H2+ and V3s" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits) ARM: ux500: remove deleted file from Makefile ARM: ep93xx: Disable TS-72xx watchdog before uncompressing ARM: ux500: cut some platform data MAINTAINERS: Update for the current location of the bcm2835 tree. ARM: davinci: remove BUG_ON() from da850_register_sata() ARM: davinci: da850: model the SATA refclk ARM: davinci: da850: add con_id for the SATA clock ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA arm: mvebu: support for SMP on 98DX3336 SoC dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property soc: dove: constify reset_control_ops structures ARM: mv78xx0: fix possible PCI buffer overflow MAINTAINERS: transfer maintainership for the EZX platform ARM: shmobile: rcar-gen2: Add more register documentation ARM: tegra: paz00: Fix __initdata placement ARM: OMAP: clock: Remove unused mpurate cmdline option ARM: davinci: add skeleton for pdata-quirks arm: sunxi: add support for V3s SoC ARM: OMAP2+: omap_hwmod: Add support for earlycon arm: hisi: drop extern hip01_cpu_die ...
2017-02-07clocksource/drivers/ostm: Add renesas-ostm timer driverChris Brandt1-0/+1
This patch adds a OSTM driver for the Renesas architecture. The OS Timer (OSTM) has independent channels that can be used as a freerun or interval times. This driver uses the first probed device as a clocksource and then any additional devices as clock events. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-17 21:38:21 +0000