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2013-06-21ARM: at91: fix at91_extern_irq usage for non-dt boardsJean-Christophe PLAGNIOL-VILLARD1-0/+1
Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf ARM: at91: add AIC5 support we allocate the at91_extern_irq. This patch makes it static and stores the non-dt extern irq in the soc structure. It is then possible to use a at91_get_extern_irq() function to get the value for outside of the irq driver. It is useful for passing its value to at91_aic_init(). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> [nicolas.ferre@atmel.com: rework commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-03-26ARM: at91: introduce SAMA5 supportLudovic Desroches1-0/+5
This patch introduces the SAMA5 support and a generic board file for SAMA5 devices. It also updates the PMC driver to manage clock division which is a requirement since some peripherals can't work at the bus frequency on SAMA5. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-03-26ARM: at91: change name template in AT91_SOC_START macroLudovic Desroches1-1/+1
New devices are no more prefixed with at91 so remove the at91 and _name concatenation. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-10-13arm: at91: use macro to declare soc boot dataJean-Christophe PLAGNIOL-VILLARD1-1/+11
Instead of check the pointer of the init function, check the new builtin bool to known if the soc is enabled. This is needed as with the switch to the pinctrl the init will be NULL on pure DT SoC. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-28ARM: at91: Add machine header file for AT91SAM9N12 SoCHong Xu1-0/+5
Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-17ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core supportJean-Christophe PLAGNIOL-VILLARD1-7/+7
We can now compile all SoC core support together and DT boards. We still can not compile together the non DT board. So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig compatibility. This will enable the plaform_device ressources. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03ARM: at91: code removal of CAP9 SoCJean-Christophe PLAGNIOL-VILLARD1-5/+0
Following removal announce and addition to feature-removal-schedule.txt, here is the actual source code deletion for Atmel CAP9 family. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: add ioremap_registers entry point to soc setupJean-Christophe PLAGNIOL-VILLARD1-0/+1
this will allow to ioremap the register of the PIT, PMC and others and make the code soc independent Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-07-28at91: move register clocks to soc generic initJean-Christophe PLAGNIOL-VILLARD1-0/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: move clock subsystem init to soc generic initJean-Christophe PLAGNIOL-VILLARD1-1/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD1-10/+47
instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: factorize at91 interrupts init to socJean-Christophe PLAGNIOL-VILLARD1-0/+1
they are the same except the default priority Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD1-0/+20
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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