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2014-08-25ARM: at91: Remove reset code from the machine codeMaxime Ripard1-45/+0
Now that the transition is over and that we probe our reset driver in every case, we can remove the legacy code from the machine directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-09-30ARM: at91: sam9g45: shutdown ddr1 too when rebootingJean-Christophe PLAGNIOL-VILLARD1-0/+8
Like we are doing on DDR0 we need to cleanly shutdown DDR1 if it is used before rebooting. If DDR1 is not initialized, we check it and avoid dereferencing its address. Even by adding two more instructions, we are able to complete the procedure within a single cache line. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-06arm: at91: move reset controller header to arm/arm/mach-at91Jean-Christophe PLAGNIOL-VILLARD1-2/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD1-7/+5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20ARM: at91: Fix at91sam9g45 and at91cap9 resetJean-Christophe PLAGNIOL-VILLARD1-0/+40
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting. On those SoC the SDRAM/DDRAM controller is different. So, the assembly code ends up being not cleanly combined with previous at91sam9_alt_restart function. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>