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2011-07-24Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds19-197/+135
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
2011-07-22Merge branch 'timers-cleanup-for-linus' of ↵Linus Torvalds1-15/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: mips: Fix i8253 clockevent fallout i8253: Cleanup outb/inb magic arm: Footbridge: Use common i8253 clockevent mips: Use common i8253 clockevent x86: Use common i8253 clockevent i8253: Create common clockevent implementation i8253: Export i8253_lock unconditionally pcpskr: MIPS: Make config dependencies finer grained pcspkr: Cleanup Kconfig dependencies i8253: Move remaining content and delete asm/i8253.h i8253: Consolidate definitions of PIT_LATCH x86: i8253: Consolidate definitions of global_clock_event i8253: Alpha, PowerPC: Remove unused asm/8253pit.h alpha: i8253: Cleanup remaining users of i8253pit.h i8253: Remove I8253_LOCK config i8253: Make pcsp sound driver use the shared i8253_lock i8253: Make pcspkr input driver use the shared i8253_lock i8253: Consolidate all kernel definitions of i8253_lock i8253: Unify all kernel declarations of i8253_lock i8253: Create linux/i8253.h and use it in all 8253 related files
2011-07-22Merge branch 'devel-stable' into for-nextRussell King7-43/+58
Conflicts: arch/arm/kernel/entry-armv.S
2011-07-22Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', ↵Russell King12-106/+73
'mmci', 'suspend' and 'vfp' into for-next
2011-07-22ARM: 7004/1: fix traps.h compile warningsMikael Pettersson1-0/+3
Building kernel 3.0 for an n2100 (plat-iop) results in: In file included from arch/arm/plat-iop/cp6.c:20: /tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: 'struct pt_regs' declared inside parameter list /tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: its scope is only this definition or declaration, which is probably not what you want /tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct pt_regs' declared inside parameter list /tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct task_struct' declared inside parameter list arch/arm/plat-iop/cp6.c:45: warning: initialization from incompatible pointer type Nothing here depends on the layout of pt_regs or task_struct, so this can be fixed by adding forward struct declarations to asm/traps.h. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-22ARM: 6998/2: kernel: use proper memory barriers for bitopsHeechul Yun1-2/+2
Improve scalability by avoiding costly and unnecessary L2 cache sync in handling bitops. Signed-off-by: Heechul Yun <hyun@nvidia.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-22ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAMPetr Štetiar1-1/+5
I've got hands on one ts-7300 board, which is equiped with 128MB RAM in two 64MB memory chips, so it's 16 banks/8MB each. Without this patch, the bootmem init code complains about small NR_BANKS number and only lower 64MB is accessible. Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanenceRussell King1-48/+10
Kernel space needs very little in the way of BTC maintanence as most mappings which are created and destroyed are non-executable, and so could never enter the instruction stream. The case which does warrant BTC maintanence is when a module is loaded. This creates a new executable mapping, but at that point the pages have not been initialized with code and data, so at that point they contain unpredictable information. Invalidating the BTC at this stage serves little useful purpose. Before we execute module code, we call flush_icache_range(), which deals with the BTC maintanence requirements. This ensures that we have a BTC maintanence operation before we execute code via the newly created mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-18Merge branch 'dma' of http://git.linaro.org/git/people/nico/linux into ↵Russell King4-92/+23
devel-stable
2011-07-18ARM: ARM_DMA_ZONE_SIZE is no moreNicolas Pitre1-2/+0
One less dependency on mach/memory.h. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: add dma_zone_size to the machine_desc structureNicolas Pitre1-0/+4
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: change ARM_DMA_ZONE_SIZE into a variableNicolas Pitre1-3/+6
Having this value defined at compile time prevents multiple machines with conflicting definitions to coexist. Move it to a variable in preparation for having a per machine value selected at run time. This is relevant only when CONFIG_ZONE_DMA is selected. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-15Merge branch 'kprobes-thumb' of git://git.yxit.co.uk/linux into devel-stableRussell King2-22/+17
2011-07-13ARM: ptrace: Add APSR_MASK definition to ptrace.hJon Medhurst1-1/+2
APSR_MASK can be used to extract the APSR bits from the CPSR. The comment for these definitions is also changed because it was inaccurate as the existing defines didn't refer to any part of the APSR. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Extend arch_specific_insn to add pointer to emulated instructionJon Medhurst1-0/+2
When we come to emulating Thumb instructions then, to interwork correctly, the code on in the instruction slot must be invoked with a function pointer which has the least significant bit set. Rather that set this by hand in every Thumb emulation function we will add a new field for this purpose to arch_specific_insn, called insn_fn. This also enables us to seamlessly share emulation functions between ARM and Thumb code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add hooks to override singlestep()Jon Medhurst1-4/+5
When a probe fires we must single-step the instruction which was replaced by a breakpoint. As the steps to do this vary between ARM and Thumb instructions we need a way to customise single-stepping. This is done by adding a new hook called insn_singlestep to arch_specific_insn which is initialised by the instruction decoding functions. These single-step hooks must update PC and call the instruction handler. For Thumb instructions an additional step of updating ITSTATE is needed. We do this after calling the handler because some handlers will need to test if they are running in an IT block. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Split out internal parts of kprobes.hJon Medhurst1-17/+0
Later, we will be adding a considerable amount of internal implementation definitions to kprobe header files and it would be good to have these in local header file along side the source code, rather than pollute the existing header which is include by all users of kprobes. To this end, we add arch/arm/kernel/kprobes.h and move into this the existing internal defintions from arch/arm/include/asm/kprobes.h Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: Thumb-2: Support Thumb-2 in undefined instruction handlerJon Medhurst1-0/+8
This patch allows undef_hook's to be specified for 32-bit Thumb instructions and also to be used for thumb kernel-side code. 32-bit Thumb instructions are specified in the form: ((first_half << 16 ) | second_half) which matches the layout used by the ARM ARM. ptrace was handling 32-bit Thumb instructions by hooking the first halfword and manually checking the second half. This method would be broken by this patch so it is migrated to make use of the new Thumb-2 support. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-12ARM: dma: replace ISA_DMA_THRESHOLD with a variableRussell King2-39/+2
ISA_DMA_THRESHOLD has been unused by non-arch code, so lets now get rid of it from ARM by replacing it with arm_dma_zone_mask. Move dma_supported() and dma_set_mask() out of line, and have dma_supported() check this new variable instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-08ARM: dmabounce: simplify dma_set_mask()Russell King1-8/+2
Simplify the dmabounce specific code in dma_set_mask(). We can just omit setting the dma mask if dmabounce is enabled (we will have already set dma mask via callbacks when the device is created in that case.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-07ARM: ensure tag tables are constRussell King1-1/+1
Nothing should ever modify a tag table entry, so mark these const. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-07ARM: perf: add support for the Cortex-A15 PMUWill Deacon1-0/+1
This patch adds support for the Cortex-A15 PMU to the ARMv7 perf-event backend. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: perf: add support for the Cortex-A5 PMUWill Deacon1-0/+1
This patch adds support for the Cortex-A5 PMU to the ARMv7 perf-event backend. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: hwcaps: add new HWCAP defines for ARMv7-AWill Deacon1-0/+4
Modern ARMv7-A cores can optionally implement these new hardware features: - VFPv4: The latest version of the ARMv7 vector floating-point extensions, including hardware support for fused multiple accumulate. D16 or D32 variants may be implemented. - Integer divide: The SDIV and UDIV instructions provide signed and unsigned integer division in hardware. When implemented, these instructions may be available in either both Thumb and ARM, or Thumb only. This patch adds new HWCAP defines to describe these new features. The integer divide capabilities are split into two bits for ARM and Thumb respectively. Whilst HWCAP_IDIVA should never be set if HWCAP_IDIVT is clear, separating the bits makes it easier to interpret from userspace. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: hwcaps: use shifts instead of hardcoded constantsWill Deacon1-16/+16
The HWCAP numbers are defined as constants, each one being a power of 2. This has become slightly unwieldy now that we have reached 32k. This patch changes the HWCAP defines to use (1 << n) instead of coding the constant directly. The values remain unchanged. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: assembler.h: Add string declaration macroDave Martin1-0/+9
Declaring strings in assembler source involves a certain amount of tedious boilerplate code in order to annotate the resulting symbol correctly. Encapsulating this boilerplate in a macro should help to avoid some duplication and the occasional mistake. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-06ARM: 6988/1: multi-cpu: remove arguments from CPU proc macrosWill Deacon1-7/+7
The macros for invoking functions via the processor struct in the MULTI_CPU case define the arguments as part of the macros, making it impossible to take the address of those functions. This patch removes the arguments from the macro definitions so that we can take the address of these functions like we can for the !MULTI_CPU case. Reported-by: Frank Hofmann <frank.hofmann@tomtom.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-06ARM: 6985/1: export functions to determine the presence of I/DTCMLinus Walleij1-0/+2
By allowing code to detect whether DTCM or ITCM is present, code paths involving TCM can be avoided when running on platforms that lack it. This is good for creating single kernels across several archs, if some of them utilize TCM but others don't. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-04ARM: dmabounce: get rid of dma_needs_bounce global functionRussell King1-20/+2
Pass the device type specific needs_bounce function in at dmabounce register time, avoiding the need for a platform specific global function to do this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-03ARM: dma-mapping: define dma_(un)?map_single in terms of dma_(un)?map_pageRussell King1-22/+9
Use dma_map_page()/dma_unmap_page() internals to handle dma_map_single() and dma_unmap_single(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-02ARM: entry: re-allocate registers in irq entry assembly macrosRussell King1-7/+7
This avoids the irq entry assembly corrupting r5, thereby allowing it to be preserved through to the svc exit code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-02ARM: pm: allow suspend finisher to return error codesRussell King1-4/+5
There are SoCs where attempting to enter a low power state is ignored, and the CPU continues executing instructions with all state preserved. It is over-complex at that point to disable the MMU just to call the resume path. Instead, allow the suspend finisher to return error codes to abort suspend in this circumstance, where the cpu_suspend internals will then unwind the saved state on the stack. Also omit the tlb flush as no changes to the page tables will have happened. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-29ARM: 6974/1: pmu: refactor reservationMark Rutland1-1/+1
Currently, PMU platform_device reservation relies on some minor abuse of the platform_device::id field for determining the type of PMU. This is problematic for device tree based probing, where the ID cannot be controlled. This patch removes reliance on the id field, and depends on each PMU's platform driver to figure out which type it is. As all PMUs handled by the current platform_driver name "arm-pmu" are CPU PMUs, this convention is hardcoded. New PMU types can be supported through the use of {of,platform}_device_id tables Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-24ARM: pm: ensure our temporary page table entry is removed from the TLBRussell King1-0/+2
Ensure that our temporary page table entry is flushed from the TLB before we resume normal operations. This ensures that userspace won't trip over the stale TLB entry. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-24ARM: pm: hide 1st and 2nd arguments to cpu_suspend from platform codeRussell King2-2/+19
The first and second arguments shouldn't concern platform code, so hide them from each platforms caller. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-24ARM: pm: convert cpu_suspend() to a normal functionRussell King1-0/+2
cpu_suspend() has a weird calling method which makes it only possible to call from assembly code: it returns with a modified stack pointer to finish the suspend, but on resume, it 'returns' via a provided pointer. We can make cpu_suspend() appear to be a normal function merely by swapping the resume pointer argument and the link register. Do so, and update all callers to take account of this more traditional behaviour. Acked-by: Frank Hofmann <frank.hofmann@tomtom.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-17ARM: 6959/1: SMP build fix for entry-macro-multi.SMagnus Damm2-0/+6
The assembly code in entry-macro-multi.S does not build without the include asm/assembler.h in the case of CONFIG_SMP=y. Fixes the rather theoretical SMP build of mach-shmobile/entry-intc.c: arch/arm/include/asm/entry-macro-multi.S: Assembler messages: arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_smp(test_for_ipi r0,r6,r5,lr)' arch/arm/include/asm/entry-macro-multi.S:20: Error: bad instruction `alt_up_b(9997f)' make[1]: *** [arch/arm/mach-shmobile/entry-intc.o] Error 1 make: *** [arch/arm/mach-shmobile] Error 2 make: *** Waiting for unfinished jobs.... Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-09i8253: Move remaining content and delete asm/i8253.hRalf Baechle1-4/+0
Move setup_pit_timer() declaration to the common header file and remove the arch specific ones. [ tglx: Move it to linux/i8253.h instead of asm/mips and asm/x86 ] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-mips@linux-mips.org Cc: Sergei Shtylyov <sshtylyov@mvista.com Link: http://lkml.kernel.org/r/20110601180610.913463093@duck.linux-mips.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-06-09i8253: Consolidate definitions of PIT_LATCHRalf Baechle1-2/+0
x86 defines PIT_LATCH as LATCH which in <linux/timex.h> is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and <asm/timex.h> again defines CLOCK_TICK_RATE as PIT_TICK_RATE. MIPS defines PIT_LATCH as LATCH which in <linux/timex.h> is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and <asm/timex.h> again defines CLOCK_TICK_RATE as 1193182. ARM defines PITCH_LATCH as ((PIT_TICK_RATE + HZ / 2) / HZ) - and that's the sanest thing and equivalent to above definitions so use that as the new definition in <linux/i8253.h>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/20110601180610.832810002@duck.linux-mips.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-06-09i8253: Unify all kernel declarations of i8253_lockRalf Baechle1-9/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/20110601180610.134151920@duck.linux-mips.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-06-02ARM: Allow SoCs to enable scatterlist chainingRussell King1-0/+4
Allow SoCs to enable the scatterlist chaining support, which allows scatterlist tables to be broken up into smaller allocations. As support for this feature depends on the implementation details of the users of the scatterlists, we can't enable this globally without auditing all the users, which is a very big task. Instead, let SoCs progressively switch over to using this. SoC drivers using scatterlists and SoC DMA implementations need auditing before this option can be enabled for the SoC. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-28Merge branch 'setns'Linus Torvalds1-0/+1
* setns: ns: Wire up the setns system call Done as a merge to make it easier to fix up conflicts in arm due to addition of sendmmsg system call
2011-05-28ns: Wire up the setns system callEric W. Biederman1-0/+1
32bit and 64bit on x86 are tested and working. The rest I have looked at closely and I can't find any problems. setns is an easy system call to wire up. It just takes two ints so I don't expect any weird architecture porting problems. While doing this I have noticed that we have some architectures that are very slow to get new system calls. cris seems to be the slowest where the last system calls wired up were preadv and pwritev. avr32 is weird in that recvmmsg was wired up but never declared in unistd.h. frv is behind with perf_event_open being the last syscall wired up. On h8300 the last system call wired up was epoll_wait. On m32r the last system call wired up was fallocate. mn10300 has recvmmsg as the last system call wired up. The rest seem to at least have syncfs wired up which was new in the 2.6.39. v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com> v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com> v4: Moved wiring up of the system call to another patch v5: ported to v2.6.39-rc6 v6: rebased onto parisc-next and net-next to avoid syscall conflicts. v7: ported to Linus's latest post 2.6.39 tree. >  arch/blackfin/include/asm/unistd.h     |    3 ++- >  arch/blackfin/mach-common/entry.S      |    1 + Acked-by: Mike Frysinger <vapier@gentoo.org> Oh - ia64 wiring looks good. Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-27Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds7-3/+74
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) ARM: 6945/1: Add unwinding support for division functions ARM: kill pmd_off() ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks ARM: 6943/1: mm: use TTBR1 instead of reserved context ID ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7 ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area ARM: add sendmmsg syscall ARM: 6863/1: allow hotplug on msm ARM: 6832/1: mmci: support for ST-Ericsson db8500v2 ARM: 6830/1: mach-ux500: force PrimeCell revisions ARM: 6829/1: amba: make hardcoded periphid override hardware ARM: 6828/1: mach-ux500: delete SSP PrimeCell ID ARM: 6827/1: mach-netx: delete hardcoded periphid ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resume ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2 ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM at91: drop at572d940hf support at91rm9200: introduce at91rm9200_set_type to specficy cpu package at91: drop boot_params and PLAT_PHYS_OFFSET ...
2011-05-27Merge branches 'devel', 'devel-stable' and 'fixes' into for-linusRussell King6-1/+53
2011-05-26arm: use asm-generic/bitops/le.hAkinobu Mita1-38/+5
The previous style change enables to use asm-generic/bitops/le.h on arm. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-26arch: add #define for each of optimized find bitopsAkinobu Mita1-0/+3
The style that we normally use in asm-generic is to test the macro itself for existence, so in asm-generic, do: #ifndef find_next_zero_bit_le extern unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset); #endif and in the architectures, write static inline unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset) #define find_next_zero_bit_le find_next_zero_bit_le This adds the #define for each of the optimized find bitops in the architectures. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-26ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7Catalin Marinas1-0/+1
This patch makes TTBR1 point to swapper_pg_dir so that global, kernel mappings can be used exclusively on v6 and v7 cores where they are needed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-26ARM: add sendmmsg syscallRussell King1-0/+1
Commit 228e548e (net: Add sendmmsg socket system call) added the new sendmmsg syscall. Add this to the syscall table for ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-26ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resumeDave Martin1-0/+7
Drivers which make use of the FIQ interrupt may require the state of the FIQ mode registers to be preserved across suspend/resume. Because the FIQ mode registers are not saved and restored automatically by the kernel, driver authors will need to do the appropriate save/restore in their own driver suspend/resume handlers. Implementing global automatic save/restore of the FIQ state does not appear appropriate, since this by itself is not sufficient for FIQ-based drivers to function correctly across suspend/resume in any case. This patch adds a brief explanatory note to fiq.h documenting the requirement placed on driver authors. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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