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2011-11-01Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2-0/+5
* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits) ARM: pxa/cm-x300: properly set bt_reset pin ARM: mmp: rename SHEEVAD to GPLUGD ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT' ARM: i.MX28: shift frac value in _CLK_SET_RATE plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired ARM: mx5: fix clock usage for suspend ARM: pxa: use correct __iomem annotations ARM: pxa: sharpsl pm needs SPI ARM: pxa: centro and treo680 need palm27x ARM: pxa: make pxafb_smart_*() empty when not enabled ARM: pxa: select POWER_SUPPLY on raumfeld ARM: pxa: pxa95x is incompatible with earlier pxa ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ ARM: pxa: pxa95x/saarb depends on pxa3xx code ARM: pxa: allow selecting just one of TREO680/CENTRO ARM: pxa: export symbols from pxa3xx-ulpi ARM: pxa: make zylonite_pxa*_init declaration match code ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available ARM: at91: add defconfig for at91sam9g45 family ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig ...
2011-10-28Merge branch 'devel-stable' of ↵Linus Torvalds8-52/+396
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'devel-stable' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (178 commits) ARM: 7139/1: fix compilation with CONFIG_ARM_ATAG_DTB_COMPAT and large TEXT_OFFSET ARM: gic, local timers: use the request_percpu_irq() interface ARM: gic: consolidate PPI handling ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H ARM: mach-s5p64x0: remove mach/memory.h ARM: mach-s3c64xx: remove mach/memory.h ARM: plat-mxc: remove mach/memory.h ARM: mach-prima2: remove mach/memory.h ARM: mach-zynq: remove mach/memory.h ARM: mach-bcmring: remove mach/memory.h ARM: mach-davinci: remove mach/memory.h ARM: mach-pxa: remove mach/memory.h ARM: mach-ixp4xx: remove mach/memory.h ARM: mach-h720x: remove mach/memory.h ARM: mach-vt8500: remove mach/memory.h ARM: mach-s5pc100: remove mach/memory.h ARM: mach-tegra: remove mach/memory.h ARM: plat-tcc: remove mach/memory.h ARM: mach-mmp: remove mach/memory.h ARM: mach-cns3xxx: remove mach/memory.h ... Fix up mostly pretty trivial conflicts in: - arch/arm/Kconfig - arch/arm/include/asm/localtimer.h - arch/arm/kernel/Makefile - arch/arm/mach-shmobile/board-ap4evb.c - arch/arm/mach-u300/core.c - arch/arm/mm/dma-mapping.c - arch/arm/mm/proc-v7.S - arch/arm/plat-omap/Kconfig largely due to some CONFIG option renaming (ie CONFIG_PM_SLEEP -> CONFIG_ARM_CPU_SUSPEND for the arm-specific suspend code etc) and addition of NEED_MACH_MEMORY_H next to HAVE_IDE.
2011-10-25Merge branch 'misc' into for-linusRussell King2-0/+17
Conflicts: arch/arm/mach-integrator/integrator_ap.c
2011-10-24ARM: 7139/1: fix compilation with CONFIG_ARM_ATAG_DTB_COMPAT and large ↵Nicolas Pitre1-1/+2
TEXT_OFFSET If TEXT_OFFSET is too large (e.g. like on MSM) the resulting immediate argument gets wider than 8 bits. Noticed by David Brown <davidb@codeaurora.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7120/1: remove bashism in check for multiple zreladdrsRabin Vincent1-1/+1
Get rid of this complaint from dash: AS arch/arm/boot/compressed/lib1funcs.o /bin/sh: 1: [: y: unexpected operator LD arch/arm/boot/compressed/vmlinux Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7021/1: Check for multiple load addresses before building a uImageSascha Hauer1-0/+9
uImages need a load address specified. This makes them incompatible with multiple zreladdrs. Catch this error before building an uImage so that we do not end up with broken uImages. The load address can still be specified with LOADADDR= on the command line. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7020/1: Check for multiple zreladdrsSascha Hauer1-0/+8
Without CONFIG_AUTO_ZRELADDR being set the kernel needs a single zreladdr for building zImages. Bail out if we detect multiple zreladdrs without CONFIG_AUTO_ZRELADDR. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-22arm/dt: Tegra: Add support-8bit to SDHCI nodesStephen Warren2-0/+5
For Seaboard's internal eMMC, this makes the difference between a 5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any measurable difference on my cheap/slow ~2MB/s card. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-09-20arm/dt: Tegra: Update SDHCI nodes to match bindingsStephen Warren2-9/+9
The bindings were recently updated to have separate properties for each type of GPIO. Update the Device Tree source to match that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-09-16Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6-wd into devel-stableRussell King2-2/+2
Conflicts: arch/arm/mach-imx/mach-cpuimx27.c
2011-09-14ARM: zImage: prevent constant copy+rebuild of lib1funcs.SNicolas Pitre1-2/+2
The rule to copy this file doesn't have to be forced. However lib1funcs.[So] have to be listed amongst the targets. This prevents zImage from being recreated needlessly. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-09-14ARM: zImage: allow supplementing appended DTB with traditional ATAG dataNicolas Pitre5-2/+172
Some old bootloaders can't be updated to a device tree capable one, yet they provide ATAGs with memory configuration, the ramdisk address, the kernel cmdline string, etc. To allow a device tree enabled kernel to be used with such bootloaders, it is necessary to convert those ATAGs into FDT properties and fold them into the DTB appended to zImage. Currently the following ATAGs are converted: ATAG_CMDLINE ATAG_MEM ATAG_INITRD2 If the corresponding information already exists in the appended DTB, it is replaced, otherwise the required node is created to hold it. The code looks for ATAGs at the location pointed by the value of r2 upon entry into the zImage code. If no ATAGs are found there, an attempt at finding ATAGs at the typical 0x100 offset from start of RAM is made. Otherwise the DTB is left unchanged. Thisstarted from an older patch from John Bonesio <bones@secretlab.ca>, with contributions from David Brown <davidb@codeaurora.org>. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-09-14ARM: zImage: gather some string functions into string.cNicolas Pitre3-41/+132
This is a small subset of string functions needed by commits to come. Except for memcpy() which is unchanged from its original location, their implementation is meant to be small, and -Os is enforced to prevent gcc from doing pointless loop unrolling. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-09-14ARM: zImage: make sure appended DTB doesn't get overwritten by kernel .bssNicolas Pitre2-4/+18
The appended DTB gets relocated with the decompressor code to get out of the way of the decompressed kernel. However the kernel's .bss section may be larger than the relocated code and data, and then the DTB gets overwritten. Let's make sure the relocation takes care of moving zImage far enough so no such conflict with .bss occurs. Thanks to Tony Lindgren <tony@atomide.com> for figuring out this issue. While at it, let's clean up the code a bit so that the wont_overwrite symbol is used while determining if a conflict exists, making the above change more precise as well as eliminating some ARM/THUMB alternates. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-09-14ARM: zImage: Allow the appending of a device tree binaryJohn Bonesio1-3/+67
This patch provides the ability to boot using a device tree that is appended to the raw binary zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb). Signed-off-by: John Bonesio <bones@secretlab.ca> [nico: ported to latest zImage changes plus additional cleanups/improvements] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-09-14ARM: zImage: ensure it is always a multiple of 64 bits in sizeNicolas Pitre1-0/+4
This is needed for proper alignment when the DTB appending feature is used. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dave Martin <dave.martin@linaro.org> Tested-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-08-08Merge branch 'master' of ↵Paul Mundt9-0/+964
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into rmobile-latest
2011-08-08mmc: sdhi, mmcif: zboot: Correct clock disable logicSimon Horman2-2/+2
This corrects a logic-error that I made in the original implementation. An alternate patch would be to just remove these lines and leave the clock running as it is reconfigured later on during boot anyway. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-07-28Merge branch 'imx/dt' into next/dtArnd Bergmann2-0/+468
2011-07-28arm/dt: tegra devicetree supportGrant Likely3-0/+237
Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-28arm/versatile: Add device tree supportGrant Likely2-0/+240
For testing the dt work, define a dt-enabled versatile platform. This patch adds a new versatile platform for when using the device tree. Add platform and amba devices are discovered and registered by parsing the device tree. Clocks and initial io mappings are still configured statically. This patch still depends on some static platform_data for a few devices which is passed via the auxdata structure to of_platform_populate(), but it is a viable starting point until the drivers can get all configuration data out of the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-26Merge branch 'next/soc' of ↵Linus Torvalds2-0/+468
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: MAINTAINERS: add maintainer of CSR SiRFprimaII machine ARM: CSR: initializing L2 cache ARM: CSR: mapping early DEBUG_LL uart ARM: CSR: Adding CSR SiRFprimaII board support OMAP4: clocks: Update the clock tree with 4460 clock nodes OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts OMAP4: ID: add omap_has_feature for max freq supported OMAP: ID: introduce chip detection for OMAP4460 ARM: Xilinx: merge board file into main platform code ARM: Xilinx: Adding Xilinx board support Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
2011-07-25arm/dt: Add dtb make ruleRob Herring1-0/+6
Add a make rule to compile dt blobs for ARM. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-25arm/dt: Add skeleton dtsi fileGrant Likely1-0/+13
Contains the bare minimum template required to boot with the device tree. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-22Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', ↵Russell King8-15/+593
'mmci', 'suspend' and 'vfp' into for-next
2011-07-19ARM: 6999/1: head, zImage: Always Enter the kernel in ARM stateDave Martin1-1/+2
Currently, the documented kernel entry requirements are not explicit about whether the kernel should be entered in ARM or Thumb, leading to an ambiguitity about how to enter Thumb-2 kernels. As a result, the kernel is reliant on the zImage decompressor to enter the kernel proper in the correct instruction set state. This patch changes the boot entry protocol for head.S and Image to be the same as for zImage: in all cases, the kernel is now entered in ARM. Documentation/arm/Booting is updated to reflect this new policy. A different rule will be needed for Cortex-M class CPUs as and when support for those lands in mainline, since these CPUs don't support the ARM instruction set at all: a note is added to the effect that the kernel must be entered in Thumb on such systems. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-17Merge branch 'zynq/master' of ↵Arnd Bergmann1-0/+52
git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/soc Conflicts: arch/arm/Kconfig arch/arm/mm/Kconfig
2011-07-09ARM: CSR: Adding CSR SiRFprimaII board supportBinghua Duan1-0/+416
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-07ARM: decompressor: use better output sectionsRussell King1-4/+8
Place read-only data in a .rodata output section, and the compressed piggy data in .piggydata. Place the .got.plt section before the .got section as is standard ELF practise. This allows the piggydata to be more easily extracted from the compressed vmlinux file for verification purposes. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-29ARM: 6886/1: mmc, Add zboot from eSD support for SuperH Mobile ARMSimon Horman6-9/+570
This allows a ROM-able zImage to be written to eSD and for SuperH Mobile ARM to boot directly from the SDHI hardware block. This is achieved by the MaskROM loading the first portion of the image into MERAM and then jumping to it. This portion contains loader code which copies the entire image to SDRAM and jumps to it. From there the zImage boot code proceeds as normal, uncompressing the image into its final location and then jumping to it. Cc: Paul Mundt <lethal@linux-sh.org> Acked-by: Magnus Damm <magnus.damm@gmail.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-21ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entriesDave Martin1-1/+13
It is easy to mis-maintain the proc_types table such that the entries become wrongly-sized and misaligned when the kernel is built in Thumb-2. This patch adds an assembly-time check which will turn most common size/alignment mistakes in this table into build failures, to avoid having to debug the boot-time kernel hang which would happen if the resulting kernel were actually booted. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-20ARM: Xilinx: Adding Xilinx board supportJohn Linn1-0/+52
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
2011-06-09ARM: 6954/1: zImage: fix Thumb2 breakageNicolas Pitre1-3/+3
Commit af3e4fd37a "ARM: 6859/1: Add writethrough dcache support for ARM926EJS processor" broke Thumb2 compilation by omitting to maintain the wide encoding for the added branch instructions which made the ARM926EJ-S record smaller than expected, breaking the record walk code. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23Merge branch 'devel-stable' into for-linusRussell King4-30/+45
Conflicts: arch/arm/Kconfig arch/arm/mach-ns9xxx/include/mach/uncompress.h
2011-05-23Merge branches 'consolidate', 'ep93xx', 'fixes', 'misc', 'mmci', 'remove' ↵Russell King1-0/+16
and 'spear' into for-linus
2011-05-12ARM: 6859/1: Add writethrough dcache support for ARM926EJS processorMark A. Greer1-0/+16
The ARM kernel supports writethrough data cache via the CONFIG_CPU_DCACHE_WRITETHROUGH option. However, that functionality wasn't implemented in the arch/arm/boot/compressed code. It is now necessary due to a new ARM926EJS processor that has an issue with writeback data cache. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-07Merge first four commits of 'zImage_fixes' of ↵Russell King3-12/+26
git://git.linaro.org/people/nico/linux into fixes
2011-05-07Merge branch 'zImage_fixes' of git://git.linaro.org/people/nico/linux into ↵Russell King5-35/+70
devel-stable
2011-05-07ARM: zImage: make sure no GOTOFF relocs are used with .bss symbolsNicolas Pitre2-4/+17
To be able to relocate the .bss section at run time independently from the rest of the code, we must make sure that no GOTOFF relocations are used with .bss symbols. This usually means that no global variables can be marked static unless they're also const. To enforce this, suffice to fail the build whenever a private symbol is allocated to .bss and list those symbols for convenience. The user_stack and user_stack_end labels in head.S were converted into non exported symbols to remove false positives. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2011-05-07ARM: zImage: don't ignore error returned from decompress()Nicolas Pitre2-6/+11
If decompress() returns an error without calling error(), we must not attempt to boot the resulting kernel. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2011-05-07ARM: zImage: simplify decompress_kernel()Nicolas Pitre1-11/+2
The return value for decompress_kernel() is no longer used. Furthermore, this was obtained and stored in a variable called output_ptr which is a complete misnomer for what is actually the size of the decompressed kernel image. Let's get rid of it. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2011-05-07ARM: zImage: no need to get the decompressed size from the filesystemNicolas Pitre2-4/+16
In commit d239b1dc093d the hardcoded 4x estimate for the decompressed kernel size was replaced by the exact Image file size and passed to the linker as a symbol value. Turns out that this is unneeded as the size is already included at the end of the compressed piggy data. For those compressed formats that don't include this data, the build system already takes care of appending it using size_append in scripts/Makefile.lib. So let's use that instead. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2011-05-07ARM: zImage: the page table memory must be considered before relocationNicolas Pitre1-1/+2
For correctness, the initial page table located right before the decompressed kernel should be considered when determining if relocation is required. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
2011-05-07ARM: zImage: make sure not to relocate on top of the relocation codeNicolas Pitre1-10/+17
If the zImage load address is slightly below the relocation address, there is a risk for the copied data to overwrite the copy loop or cache flush code that the relocation process requires. Always bump the relocation address by the size of that code to avoid this issue. Noticed by Tony Lindgren <tony@atomide.com>. While at it, let's start the copy from the restart symbol which makes the above code size computation possible by the assembler directly (same sections), given that we don't need to preserve the code before that point anyway. And therefore we don't need to carry the _start pointer in r5 anymore. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com>
2011-05-06ARM: zImage: Fix bad SP address after relocating kernelTony Lindgren1-0/+5
Otherwise cache_clean_flush can overwrite some of the relocated area depending on where the kernel image gets loaded. This fixes booting on n900 after commit 6d7d0ae51574943bf571d269da3243257a2d15db (ARM: 6750/1: improvements to compressed/head.S). Thanks to Aaro Koskinen <aaro.koskinen@nokia.com> for debugging the address of the relocated area that gets corrupted, and to Nicolas Pitre <nicolas.pitre@linaro.org> for the other uncompress related fixes. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-05-06ARM: zImage: make sure the stack is 64-bit alignedNicolas Pitre2-1/+2
With ARMv5+ and EABI, the compiler expects a 64-bit aligned stack so instructions like STRD and LDRD can be used. Without this, mysterious boot failures were seen semi randomly with the LZMA decompressor. While at it, let's align .bss as well. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> CC: stable@kernel.org
2011-05-03ARM: PJ4: remove the ARMv6 compatible cache method entriesNicolas Pitre1-6/+0
The Marvell PJ4 is ARMv7 capable, so we don't support it in ARMv6 mode anymore. Signed-off-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: Saeed Bishara <saeed.bishara@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2011-03-28ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC supportStephen Boyd2-20/+2
The inline assembly differences for v6 vs. v7 are purely optimizations. On a v7 processor, an mrc with the pc sets the condition codes to the 28-31 bits of the register being read. It just so happens that the TX/RX full bits the DCC support code is testing for are high enough in the register to be put into the condition codes. On a v6 processor, this "feature" isn't implemented and thus we have to do the usual read, mask, test operations to check for TX/RX full. Thus, we can drop the v7 implementation and just use the v6 implementation for both. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-25mmc: Add MMC_PROGRESS_*Simon Horman1-4/+5
This is my second attempt to make this enum generally available. The first attempt added MMCIF_PROGRESS_* to include/linux/mmc/sh_mmcif.h. However this is not sufficiently generic as the enum will be used by SDHI boot code. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-03-25mmc, ARM: Rename SuperH Mobile ARM zboot helpersSimon Horman1-6/+6
These headers and helpers will also be used for SDHI boot so the mmcif name will start to make a lot less sense. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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