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Determined by scope measurements at speed.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201208012615.2717412-7-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201202051634.490-2-wangzhiqiang.bj@bytedance.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The Mt. Jade BMC is an ASPEED AST2500-based BMC for the Mt. Jade
hardware reference platform with Ampere's Altra Processor Family.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Phong Vo <phong@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201208043700.23098-3-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Without DT aliases, the numbering of mmc interfaces is unpredictable.
Adding them makes it possible to refer to devices consistently. The
popular suggestion to use UUIDs obviously doesn't work with a blank
device fresh from the factory.
See commit fa2d0aa96941 ("mmc: core: Allow setting slot index via
device tree alias") for more discussion.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The 32-bit Amlogic Meson SoCs embed an ARC processor in the Always-On
power domain which is typically used for managing system suspend. The
memory for this ARC core is taken from the AHB SRAM area. Depending on
the actual SoC a different ARC core is used:
- Meson6 and earlier: some ARCv1 ISA based core (probably an ARC625)
- Meson8 and later: an ARC EM4 (ARCv2 ISA) based core
Add the device-tree node for this remote-processor along with the
required SRAM sections, clocks and reset-lines. Also use the
SoC-specific compatible string to manage any differences (should
they exist).
On Meson8, Meson8b and Meson8m2 the "secbus2" IO region is needed as
some bits need to be programmed there. Add this IO region for those
SoCs as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210102205904.2691120-6-martin.blumenstingl@googlemail.com
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git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
soc: sunxi: mbus: Remove DE2 display engine compatibles
Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This reverts commit c17e9377aa81664d94b4f2102559fcf2a01ec8e7.
The lpc32xx clock driver is not able to actually change the PLL rate as
this would require reparenting ARM_CLK, DDRAM_CLK, PERIPH_CLK to SYSCLK,
then stop the PLL, update the register, restart the PLL and wait for the
PLL to lock and finally reparent ARM_CLK, DDRAM_CLK, PERIPH_CLK to HCLK
PLL.
Currently, the HCLK driver simply updates the registers but this has no
real effect and all the clock rate calculation end up being wrong. This is
especially annoying for the peripheral (e.g. UARTs, I2C, SPI).
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20210203090320.GA3760268@piout.net'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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BPi Pro needs TX and RX delay for Gbit to work reliable and avoid high
packet loss rates. The realtek phy driver overrides the settings of the
pull ups for the delays, so fix this for BananaPro.
Fix the phy-mode description to correctly reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 10662a33dcd9 ("ARM: dts: sun7i: Add dts file for Bananapro board")
Signed-off-by: Hermann Lauer <Hermann.Lauer@uni-heidelberg.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210128111842.GA11919@lemon.iwr.uni-heidelberg.de
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s1 and l12 regulators are used for the memory and cache on the Samsung
S5 (klte). If they are turned off the phone shuts down. So mark them as
always-on to prevent that from happening.
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Link: https://lore.kernel.org/r/20210201105657.1642825-4-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add initial support for the display found on the Samsung Galaxy 5 (klte)
phone. This is based on work from Jonathan Marek & Brian Masney.
Signed-off-by: Samuel Pascua <pascua.samuel.14@gmail.com>
[iskren.chernev@gmail.com: add reset gpio, regulators]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-3-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable adreno dt node.
Signed-off-by: Samuel Pascua <pascua.samuel.14@gmail.com>
[iskren.chernev@gmail.com: changes after v1]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-2-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add support for the a3xx GPU. opp_table is chosen to include lower
frequencies common to all different msm8974 variants.
Signed-off-by: Brian Masney <masneyb@onstation.org>
[iskren.chernev@gmail.com: change after v1]
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210201105657.1642825-1-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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A copy & paste oversight from MMP2; camera interrupts are handled
via a multiplexer on MMP3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-13-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The firmware leaves the pins in GPIO mode. Until we have a proper pinmux
driver hooked on we just need to bitbang SPI. No big deal, this is just
used for the power button and performance is not important.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-12-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds support for the power button attached to the Embedded Controller
on a Dell Wyse 3020 "Ariel" board.
However, while the EC itself is controlled via I2C, the input capability
for the power button acts as a separate device attached to the SPI, hence
it has a separate device node.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-11-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the device node for the computer's embedded controller, responsible
for controlling the LEDs and system power.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-10-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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These are slighly easier to read.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-9-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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These are slighly easier to read.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-8-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-7-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Drop the linux,usable-memory properties; the schema is unhappy about
them.
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-6-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Drop the linux,usable-memory properties; the schema is unhappy about
them:
mmp2-olpc-xo-1-75.dt.yaml: /: memory: False schema does not allow
{'linux,usable-memory': [[0, 528482304]],
'available': [[847872, 519245824, 4096, 782336]],
'reg': [[0, 536870912]], 'device_type': ['memory']}
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-5-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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It contains a reg property. Add its base to the node name.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-4-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt for 5.12 (part 1)
Improve LED and fan support on Helios4 boad (Armada 388 based)
Add ECC configuration for Linksys board (Aramda 385 based)
* tag 'mvebu-dt-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada388-helios4: assign pinctrl to each fan
ARM: dts: armada388-helios4: assign pinctrl to LEDs
ARM: dts: armada-385-linksys: fix usage with newer devices
Link: https://lore.kernel.org/r/87sg6fn49o.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds the Richtek RT8515 Flash LED to the Golden,
Skomer and Janice device trees.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210201091308.284465-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/dt
ARM: DTS: Keystone update for v5.12
Contains couple updates for DWC USB3 DT nodes
* tag 'keystone_dts_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
arm: dts: keystone: Harmonize DWC USB3 DT nodes name
arm: dts: keystone: Correct DWC USB3 compatible string
Link: https://lore.kernel.org/r/1612156910-11159-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.12, please pull the following:
- Dave adds a proper compatile string for the DSI1 panel on 2711
(Raspberry Pi 4) to permit adequate driver differentiation
- Nicolas declares reserved memory regions filed by the Rasbperry Pi
bootloader to indicate the running system configuration
- Maxime declares the BSC (HDMI I2C controller) and CEC interrupt
controllers
- Stanislav fixes a tab vs. space issue in the BCM21664 DTS
* tag 'arm-soc/for-5.12/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Add the CEC interrupt controller
ARM: dts: bcm21664: Replace spaces with a tab
ARM: dts: bcm2711: Add the BSC interrupt controller
ARM: dts: bcm2711: Add reserved memory template to hold firmware configuration
ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1
Link: https://lore.kernel.org/r/20210131221721.685974-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches to support the Allwinner SoCs, this time
adding:
- DT fixes spotted through the schemas
- Mali Support for the A10s/A13/GR8/R8
- MMC improvements for the A64 and H6
- New board: SL631 Action Camera, PineTab Early Adopter
* tag 'sunxi-dt-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: dts: sunxi: Rename nmi_intc to r_intc
ARM: dts: sun8i: h2-plus: bananapi-m2-zero: Increase BT UART speed
ARM: dts: sunxi: bananapi-m2-plus: Increase BT UART speed
arm64: dts: allwinner: pine-h64: Fix typos in BT GPIOs
arm64: dts: allwinner: pinetab: Fix the panel compatible
arm64: dts: allwinner: pinephone: Remove useless light sensor supplies
arm64: dts: allwinner: h6: Use - instead of @ for DT OPP entries
ARM: dts: sun8i-a33: sina33: Add missing panel power supply
ARM: dts: sun8i-a83t: Remove empty CSI port
ARM: dts: sun8i-s3: pinecube: Fix CSI DTC warnings
ARM: dts: sun8i-s3: impetus: Fix the USB PHY ID detect GPIO properties
ARM: dts: sun8i: nanopi-r1: Fix GPIO regulator state array
ARM: dts: sun6i: primo81: Remove useless io-channel-cells
ARM: dts: sunxi: Fix CPU thermal zone node name
ARM: dts: sunxi: Add missing backlight supply
ARM: dts: sunxi: Fix the LED node names
dt-bindings: rtc: sun6i-a31-rtc: Loosen the requirements on the clocks
dt-bindings: iio: adc: Add AXP803 compatible
dt-bindings: sunxi: Fix the pinecube compatible
ARM: dts: sun8i-v3s: Add CSI0 MCLK pin definition
...
Link: https://lore.kernel.org/r/48511540-fdd6-4fbe-8037-ec9fa8436147.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The R_INTC block controls more than just the NMI, and it is a different
hardware block than the NMI INTC found in some other Allwinner SoCs, so
the label "nmi_intc" is inaccurate. Name it "r_intc" to match the
compatible and to match the few references in the vendor documentation.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210118055040.21910-6-samuel@sholland.org
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Bluetooth module on BananaPi M2 Zero can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210116103710.245617-1-jernej.skrabec@siol.net
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Bluetooth module on BananaPi M2 Plus can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210116105228.847073-1-jernej.skrabec@siol.net
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The SinA33 panel is missing its power-supply property, even though the
binding mandates it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-15-maxime@cerno.tech
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The empty CSI port triggers a dt-validate warning. Let's align with the
other DTSI and remove it entirely, expecting the DTS to fill it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-14-maxime@cerno.tech
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Our CSI endpoint trigger some DTC warnings due to the fact that we're
having a single endpoint that doesn't need any reg property, and since
we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-13-maxime@cerno.tech
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While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-12-maxime@cerno.tech
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Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-11-maxime@cerno.tech
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The mma8452 binding doesn't expect an io-channel-cells property, let's
remove it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-10-maxime@cerno.tech
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This adds a "HPA1" prefix to the amplifiers on both audio cards, this is
done in order to get more consistency for userspace running on RDU2 and
RDU3, where we have two amplifiers on a single card device in the "Zest"
configuration.
Also adjust the card names to the new standard expected by userspace.
Signed-off-by: Cory Tusar <cory.tusar@zii.aero>
[adjusted commit message]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The ALERT signaling happens on the falling edge of the signal, as rising
edge doesn't really have any notion, as it may happen much later (due to
shared IRQ line) or too early if the chip resolves the fault itself. So
only trigger the IRQ on the edge we are actually interested in.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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To use the reduced reporting mode the threshold values need to be set
explicitly. Configure the threshold to be less than 0.5% of the full
touchscreen range. This seems to be a good compromise between system
load and input accurancy.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The current 25 Ohm drive-strength is much too strong, resulting in
significant overshoot of the signal. Reduce the drive-strength to
75 Ohm to get rid of those issues.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable the i.MX6 WDOG1 internal watchdog for warm reboots. This allows
to issue emergency restarts without clearing the RAM, so collecting oops
logs from ramoops pstore in barebox becomes feasible.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.12-rc1
Fixes the pinmux configuration for the eMMC on the Ouya to fix issues
with certain bootloaders.
* tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: ouya: Fix eMMC on specific bootloaders
Link: https://lore.kernel.org/r/20210129193254.3610492-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Ouya fails to detect the eMMC module when booted via certain bootloaders.
Fastboot and hard-kexec bootloaders fail while u-boot does not. It was
discovered that the issue manifests if the sdmmc4 alternate configuration
clock pin is input disabled.
Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this
occurs, though it is likely related to other eMMC limitations experienced
on Ouya.
For now, fix it by enabling input on cam_mclk_pcc0.
Fixes: d7195ac5c9c5 ("ARM: tegra: Add device-tree for Ouya")
Reported-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.12 merge window
This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:
- More updates to use cpsw switchdev driver
- Enable gta04 PMIC power management
- Updates for dra7 for ECC support, 1.8GHz speed and keep the
ldo0 regulator always on as specified in the data manual
And then we have the new devicetree changes:
- Configure the original Amazon Echo to for audio
- Configure missing thermal interrupt for omap4430
- Configure mapphone devices for passive thermal cooling, and add
1.2GHz mode.
- Correct omap4430 sgx clock rate to use the runtime Android kernel
value, the earlier value was for a lower power operating point
- Drop turbo mode for 1GHz omap3 variants as we now have passive
cooling configured
- Update email address for Javier
- Add new MYIR Tech Limited board support
* tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
ARM: dts: omap3-igep: Change email address in copyright notice
ARM: dts: omap36xx: Remove turbo mode for 1GHz variants
ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
ARM: dts: motorola-mapphone: Add 1.2GHz OPP
ARM: dts: motorola-mapphone: Configure lower temperature passive cooling
ARM: dts: Configure missing thermal interrupt for 4430
ARM: dts: omap3-echo: Add speaker sound card support
ARM: dts: dra71-evm: mark ldo0 regulator as always on
ARM: dts: dra76x: add support for OPP_PLUS
ARM: dts: am574x-idk: add support for EMIF1 ECC
ARM: dts: omap3-gta04: fix twl4030-power settings
ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv
ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver
Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.12, round 1
Highlights:
----------
MCU part:
-Rename mmc nodes to match with yaml validation.
MPU part:
-Rename mmc nodes to match with yaml validation.
-Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
to SoC dtsi file.
-LXA:
-Fix leds schema for yaml validation.
-DH:
-Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
on DHCOM.
-Add SDMMC1 init state inorder to use some gpios during probing phase.
-Disable KS8851 and FMC on PicoITX board.
* tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
ARM: dts: stm32: Rename mmc controller nodes to mmc@
ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
ARM: dts: stm32: Add additional init state for SDMMC1 pins
ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
ARM: dts: stm32: Fix GPIO hog names on DHCOM
ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
ARM: dts: stm32: Disable WP on DHCOM uSD slot
ARM: dts: stm32: Connect card-detect signal on DHCOM
ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Split up the pins for each fan. This is needed in order to control them
Fixes: ced8025b569e ("ARM: dts: armada388-helios4")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Split up the pins to match earlier definitions. Allows LEDs to flash
properly.
Fixes: ced8025b569e ("ARM: dts: armada388-helios4")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Newer Linksys boards might come with a Winbond W29N02GV which can be
configured in different ways. Make sure we configure it the same way
as the older chips so everything keeps working.
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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usbphyc is a 48Mhz clock provider: the clock can be used as clock source
for USB OTG. Add #clock-cells property to usbphyc node to reflect this
capability.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs.
Remove them from usbphyc child phy nodes now that they are managed in
usbphyc parent node at SoC level.
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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