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2013-07-22ARM: shmobile: sh73a0: Add pin control device to device treeLaurent Pinchart1-0/+8
Add a pfc node to the sh73a0 device tree and remove manual pinmux initialization from the corresponding board files. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-18ARM: shmobile: sh73a0: remove "0x" prefix from DT node namesGuennadi Liakhovetski1-9/+9
The convention for Device Tree node names is <device>@<hex-address>, where the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi DT names. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03Merge tag 'renesas-pinmux2-for-v3.10' into boards-baseSimon Horman1-0/+81
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 This merge is made to supply run-time dependencies for the following patches that will bea added on top: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support
2013-04-02ARM: shmobile: sh73a0: add irqpin DT nodesGuennadi Liakhovetski1-0/+81
Add DT nodes for the 4 irqpin interrupt controllers on sh73a0. We add them to sh73a0.dtsi, which is also used by configurations, doing all their device instantiation from board the .c code. We rely on the fact, that such configurations don't instantiate devices from the device-tree. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-21ARM: shmobile: kzm9g-reference: fix device-tree bindings and device namesGuennadi Liakhovetski1-6/+6
Fix several device-tree bindings, that haven't been updated for newest versions of respective drivers, and device names and pin numbers, left over from non-DT and old pinctrl versions. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-21ARM: shmobile: sh73a0: move SDHI and MMCIF DT nodes to sh73a0.dtsiGuennadi Liakhovetski1-0/+44
To avoid having to repeat common DT node properties in all .dts files move them to SoC's .dtsi file, setting their status to "disabled." Individual boards will pick up devices, that they want to use and change their DT node status to enabled. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-29ARM: mach-shmobile: sh73a0: Add reg and device_type properties to cpusSimon Horman1-0/+7
Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25ARM: mach-shmobile: sh73a0: Minimal setup using DTSimon Horman1-0/+60
Allow a minimal setup of the sh73a0 SoC using a flattened device tree. In particular, Configure the i2c controllers using a flattened device tree. SCI serial controller and CMT clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. *** Please note that the clock initialisation scheme used in this patch does not currently work with SMP as there is a yet to be resolved lock-up in workqueue initialisation. CONFIG_SMP must be disabled when using this code. *** Includes update from Thierry Reding to no longer use gic_handle_irq() Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> fix
2013-01-25ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DTSimon Horman1-0/+33
This allows the GIC interrupt controller of the sh73a0 SoC to be initialised using a flattened device tree blob. It does not allow the INTC interrupt controller which is also present on the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing of interrupts between the GIC and INTC interrupt controllers. This limits the usefulness of this code to applications which only wish to access devices which use interrupts that can be handled by the GIC interrupt controller. Other applications should, for now, continue using non-device tree initialisation of the sh72a0 interrupt controllers. Includes update to use irqchip_init() by Thierry Reding Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>