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2020-09-11ARM: dts: renesas: Fix pin controller node namesGeert Uytterhoeven1-1/+1
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-07-17ARM: dts: renesas: Fix SD Card/eMMC interface device node namesYoshihiro Shimoda1-2/+2
Fix the device node names as "mmc@". Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree") Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support") Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming") Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming") Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes") Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers") Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes") Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree") Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers") Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support") Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support") Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support") Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming") Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming") Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming") Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI") Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support") Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers") Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support") Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-10ARM: dts: r7s72100: Add SPIBSC clocksChris Brandt1-2/+3
Add clocks for SPIBSC blocks. Also modify the flash node for the GR-PEACH board at the same time because now that the SPIBSC clock is identified, if it is not used by any driver, it will be turned off at the end of kernel boot. That would not work out so well for an XIP system such as GR-PEACH. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Link: https://lore.kernel.org/r/20200210123153.8257-1-chris.brandt@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20ARM: dts: renesas: Group tuples in interrupt propertiesGeert Uytterhoeven1-9/+9
To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. While "make dtbs_check" does not impose this yet for the "interrupts" property, it does for the "interrupt-map" property, leading to warnings like: pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long Fix this by grouping the tuples of the "interrupts" and "interrupt-map" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-05-20ARM: dts: r7s72100: Add IRQC device nodeGeert Uytterhoeven1-0/+19
Enable support for the IRQC on RZ/A1H, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23ARM: dts: convert to SPDX identifier for Renesas boardsWolfram Sang1-4/+1
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14ARM: dts: r7s72100: Add PMU device nodeGeert Uytterhoeven1-0/+5
Enable support for the ARM Performance Monitor Units in the Cortex-A9 CPU core on RZ/A1H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14ARM: dts: r7s72100: Correct RTC interrupt typesGeert Uytterhoeven1-3/+3
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the realtime clock interrupts are level not edge interrupts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14ARM: dts: r7s72100: Correct watchdog timer interrupt typeGeert Uytterhoeven1-1/+1
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the watchdog timer interrupt is a level interrupt. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25ARM: dts: r7s72100: Add Capture Engine Unit (CEU)Jacopo Mondi1-3/+12
Add Capture Engine Unit (CEU) node to device tree. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> [simon: rebased] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16ARM: dts: r7s72100: sort subnodes of root nodeSimon Horman1-38/+40
Sort the subnodes of the soc node to improve maintainability. The sort has been done alphabetically with the node name as the key. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnodeSimon Horman1-55/+49
The current practice is to not group clocks under a "clocks" subnode, but just put them together with the other on-SoC devices. As per updates for R-Car Gen2 SoCs by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16ARM: dts: r7s72100: sort subnodes of soc nodeSimon Horman1-285/+285
Sort the subnodes of the soc node to improve maintainability. The sort key is the address on the bus with instances of the same IP block grouped together and sorted alphabetically. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16ARM: dts: r7s72100: add soc nodeSimon Horman1-451/+459
Add soc node to represent the bus and move all nodes with a base address into this node. This is consistent with handling of R-Car Gen3 and Gen2 SoCs in mainline. It is intended to migrate other Renesas ARM-based SoCs to this scheme. The ordering is derived from simply moving each node with an address up to before any nodes without a base address that occur before the soc node. To improve maintainability follow-up patches will sort subnodes of both the new soc node and the root node. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16ARM: dts: r7s72100: add USB device to device treeChris Brandt1-0/+20
Add USB device support. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: r7s72100: Add clock for CA9 CPU coreGeert Uytterhoeven1-0/+1
Improve hardware description by adding a clock property to the device node corresponding to the CA9 CPU core. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-31ARM: dts: r7s72100: Add pin controller nodeJacopo Mondi1-0/+78
Add pin controller node with 12 gpio controller sub-nodes to r7s72100 dtsi. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15ARM: dts: r7s72100: add usb clocks to device treeChris Brandt1-3/+3
This adds the USB0 and USB1 clocks to the device tree. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-09Merge tag 'armsoc-dt' of ↵Linus Torvalds1-6/+59
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM Device-tree updates from Olof Johansson: "Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. Major new platforms: - Gemini has been ported to DT, so a handful of "new" platforms moved over from board files - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK - A bunch of embedded platforms, several Linksys platforms, Synology DS116, - Motorola Droid4 (really old OMAP-based phone) support is added. Some refactorings, i.e. Allwinner H3/H5 support is commonalized. And lots of smaller changes, cleanups, etc. See shortlog for more description We're adding ability to cross-include DT files between arm and arm64, by creating appropriate links in the dt-include directory, and using arm/ and arm64/ as include prefixes. This will avoid other local hacks such as per-file links between the two arch trees (this broke for external mirroring of DT contents). Now they can just provide their own appropriate dt-include hierarcy per platform" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits) ARM: dts: exynos: Use - instead of @ for DT OPP entries arm: spear6xx: add DT description of the ADC on SPEAr600 arm: spear6xx: remove unneeded pinctrl properties in spear600-evb arm: spear6xx: switch spear600-evb to the new flash partition DT binding arm: spear6xx: fix spaces in spear600-evb.dts arm: spear6xx: use node labels in spear600-evb.dts arm: spear6xx: add labels to various nodes in spear600.dtsi ARM: dts: vexpress: fix few unit address format warnings ARM: dts: at91: sama5d3_xplained: not all ADC channels are available ARM: dts: at91: sama5d3_xplained: fix ADC vref ARM: dts: at91: add envelope detector mux to the Axentia TSE-850 ARM: dts: armada-38x: label USB and SATA nodes ARM: dts: imx6q-utilite-pro: add hpd gpio ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply ARM: dts: imx6qdl-sabresd: Set LDO regulator supply ARM: dts: imx: add Gateworks Ventana GW5903 support ARM: dts: i.MX25: add AIPS control registers ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators ARM: dts: imx7-colibri: remove 1.8V fixed regulator ARM: dts: imx7-colibri: allow to disable Ethernet rail ...
2017-04-04ARM: dts: r7s72100: add rtc to device treeChris Brandt1-0/+14
Add the realtime clock device node. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-04ARM: dts: r7s72100: add RTC_X clock inputs to device treeChris Brandt1-0/+14
Add the RTC clocks to device tree. The frequencies must be fixed values according to the hardware manual. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-04ARM: dts: r7s72100: add rtc clock to device treeChris Brandt1-0/+9
Add the realtime clock functional clock source. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r7s72100: fix ethernet clock parentChris Brandt1-1/+1
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not the 33MHz Peripheral 0 (P0) clock. Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-24ARM: dts: r7s72100: add power-domains to sdhiChris Brandt1-0/+2
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree") Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-17ARM: 8661/1: dts: r7s72100: add l2 cacheChris Brandt1-0/+11
Note that early-bresp-disable and full-line-zero-disable are required because the sideband signals between the CPU and L2C were not connected in this SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-03-10ARM: dts: r7s72100: Add watchdog timerChris Brandt1-0/+7
Add watchdog timer support for RZ/A1. For the RZ/A1, the only way to do a reset is to overflow the WDT, so this is useful even if you don't need the watchdog functionality. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-06ARM: dts: r7s72100: update sdhi clock bindingsChris Brandt1-5/+12
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both need to be enabled/disabled for proper operation. This fixes the fact that the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and that all 4 clock sources need to be defined an used. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-25ARM: dts: r7s72100: add power-domains to mmcifChris Brandt1-0/+1
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-24ARM: dts: r7s72100: add ostm to device treeChris Brandt1-0/+18
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-24ARM: dts: r7s72100: add ostm clock to device treeChris Brandt1-0/+9
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r7s72100: add sdhi to device treeChris Brandt1-0/+26
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r7s72100: add sdhi clock to device treeChris Brandt1-0/+8
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04ARM: dts: r7s72100: add mmcif to device treeChris Brandt1-0/+12
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-17ARM: dts: r7s72100: add mmcif clock to device treeChris Brandt1-0/+9
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-05ARM: dts: r7s72100: add ethernet to device treeChris Brandt1-0/+13
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-05ARM: dts: r7s72100: add ethernet clock to device treeChris Brandt1-0/+9
Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28ARM: dts: r7s72100: Remove unnecessary clock-output-names propertiesSimon Horman1-10/+5
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-09ARM: dts: r7s72100: Rename the serial port clock to fckLaurent Pinchart1-8/+8
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r7s72100: use GIC_* definesSimon Horman1-80/+81
Use GIC_* defines for GIC interrupt cells in r7s72100 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-14ARM: shmobile: r7s72100 dtsi: Use "arm,pl390" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a9-gic" compatible value for the GIC by "arm,pl390", as the documentation states it is a PL390. This has been confirmed (thanks Chris, Wolfram!) by reading the GICD_IIDR register, which reports 0x0000043b (PL390 = 0x00, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock DomainGeert Uytterhoeven1-0/+19
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-24ARM: shmobile: r7s72100: sort dtsi file by addressUlrich Hecht1-101/+101
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-09-09ARM: shmobile: r7s72100: Use SoC-specific MTU2 compat stringSimon Horman1-1/+1
In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for a number of drivers for Renesas hardware. The purpose of this patch is to make use of the SoC-specific CMT compat string for the r7s72100 MTU2 clock source. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-17ARM: shmobile: r7s72100: Add MTU2 device to DTLaurent Pinchart1-0/+10
Add the MTU2 counter to the r7s72100 device tree and make it disabled by default. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> [horms+renesas@verge.net.au correct irq number] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-06-17ARM: shmobile: Update r7s72100 DTS to include CPU frequencyMagnus Damm1-0/+1
Add CPU Frequency information to the r7s72100 DTS file. This will allow us to use the shared C code on r7s72100 and Genmai which reads out the clock frequency from DT and calculates the delay settings from there. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14ARM: shmobile: r7s72100: add spi clocks to dtsiWolfram Sang1-0/+18
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14ARM: shmobile: r7s72100: add i2c clocks to dtsiWolfram Sang1-0/+15
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14ARM: shmobile: r7s72100: add scif nodes to dtsiWolfram Sang1-0/+96
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-14ARM: shmobile: r7s72100: add essential clock nodes to dtsiWolfram Sang1-1/+85
Only essential clocks are added for now. Other clocks will be added when needed. Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-02-18ARM: shmobile: r7s72100: add nodes for i2c controllers to dtsiWolfram Sang1-0/+72
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>