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path: root/arch/arm/boot/dts/phy3250.dts
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2012-09-25ARM: LPC32xx: LED fix in PHY3250 DTS fileRoland Stigge1-7/+5
This patch adjusts the PHY3250 board file to the actual LED configuration (active high, default-state and trigger configuration). Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-09-06ARM: LPC32xx: Adjust device tree node to new standard num-csRoland Stigge1-3/+1
In spi-pl022.c, the new device tree binding is now "num-cs" for the number of chip selects. Further, pl022,hierarchy and pl022,slave-tx-disable isn't supported in favour of reasonable defaults in the driver. Adjusting phy3250.dts to it. Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14ARM: LPC32xx: Add dt settings to the at25 nodeAlexandre Pereira da Silva1-0/+21
Add the reg, cs-gpios and max-frequencies that are needed for spi device registry in phy3250. Adds also the pl022 internal transfers details via dt Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14ARM: LPC32xx: High Speed UART configuration via DTRoland Stigge1-0/+4
This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the LPC32xx SoC, adjusting the compatible strings, adding interrupts and status configuration. On the PHY3250 reference board, UART2 is enabled. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14ARM: LPC32xx: DT conversion of Standard UARTsRoland Stigge1-0/+8
This patch switches from static serial driver initialization to devicetree configuration. This way, the Standard UARTs of the LPC32xx SoC can be enabled individually via DT. E.g., instead of Kconfig configuration, the phy3250.dts activates UARTs 3 and 5. Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14ARM: LPC32xx: DTS adjustment for using pl18x primecellRoland Stigge1-0/+8
This patch adjusts the dts files to reference the pl18x primecell driver correctly. Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14ARM: LPC32xx: DTS adjustment for key matrix controllerRoland Stigge1-0/+9
This patch connects the lpc32xx-key driver to the LPC32xx platform (via lpc32xx.dtsi), and more specifically to the reference board via its dts file. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14ARM: LPC32xx: Add NAND flash timing to PHY3250 board dtsRoland Stigge1-0/+11
This patch adds necessary NAND flash timings to the board specific dts file of the PHY3250 reference board of the LPC32xx SoC. Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-05-30ARM: LPC32xx: Adjust dts files to gpio dt bindingRoland Stigge1-2/+2
The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO banks via DT subnodes but always all at once, and changes the gpio referencing to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this binding that was just accepted to the gpio subsystem. Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-04-22ARM: LPC32xx: DTS files for device tree conversionRoland Stigge1-0/+145
This patch adds the dts files for the reference machine of LPC32xx: * arch/arm/boot/dts/lpc32xx.dtsi: Include for devices based on LPC32xx * arch/arm/boot/dts/phy3250.dts: Board support for PHYTEC phyCORE-LPC3250 Signed-off-by: Roland Stigge <stigge@antcom.de>
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