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2013-11-18ARM: dts: imx6qdl: disable spdif "rxtx5" clock optionShawn Guo1-1/+1
The spdif "rxtx5" clock option is being set to ipg clk (62) by mistake. This causes an incorrect time keeping when spdif driver is running, because ipg is ancestor clock for clocksource while spdif driver will change the rate of this clock in certain circumstance. Before the correct clock for "rxtx5" option can be supplied, let's disable this option for now by filling a dummy clock for it. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-29ARM: dts: imx6qdl: add pcie device nodeSean Cross1-0/+16
Add pcie device node for imx6qdl. Signed-off-by: Sean Cross <xobs@kosagi.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-26ARM: dts: imx6qdl: add uhs pinctrl state for usdhc3Dong Aisheng1-0/+30
This is needed for supporting ultra high speed cards like SD3.0 cards. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-26ARM: imx6qdl-wandboard: Add spdif supportFabio Estevam1-0/+21
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: ocram size is different between imx6q and imx6dlShawn Guo1-6/+0
The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB. Let's have separate node for imx6q and imx6dl. It also changes imx6q size 0x3f000 to 0x40000 to match the hardware. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liu Ying <Ying.Liu@freescale.com>
2013-08-22ARM: dts: imx: use generic DMA bindings for SSI nodesShawn Guo1-0/+9
Updates SSI nodes to adopt generic DMA bindings. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: add tempmon node for imx6q thermal supportShawn Guo1-2/+9
Mark ocotp as a syscon node and add tempmon for imx6q thermal support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: remove old DMA binding data from gpmi nodeShawn Guo1-3/+2
After mxs-dma driver adopts generic DMA device tree binding, gpmi channel interrupt number is defined in DMA controller node, and channel ID is listed in "dmas" property. So the DMA channel interrupt number in gpmi node "interrupts" property and fsl,gpmi-dma-channel which are used by old customized DMA binding can be removed now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2013-08-22ARM: dts: imx6qdl.dtsi: Add another uart3 pin groupFabio Estevam1-0/+9
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl.dtsi: Add usdhc1 pin groupsFabio Estevam1-0/+28
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl/imx6sl: add the dma property for uartHuang Shijie1-0/+10
Add the dma property for all the uart. Note: Add the dma property does not mean we enable the dma for this uart. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl: add a new pinctrl for uart3Huang Shijie1-0/+11
Add the a new pinctrl for uart3. In the imx6q{dl}-sabreauto boards, the uart3 is used for Bluetooth. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: add more imx6q/dl pin groupsShawn Guo1-0/+285
Add more imx6q/dl pin groups for those supported boards, e.g. sabresd, sabreauto, arm2. IPU2 pin groups are added into imx6q.dtsi, since the block is only available on imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: share pad macro names between imx6q and imx6dlShawn Guo1-0/+374
The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: add #dma-cells property for sdmaHuang Shijie1-0/+1
Add the #dma-cells property for all the sdma in all the imx platforms. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM i.MX6DL: dts: add clock and mux configuration for LDBPhilipp Zabel1-2/+0
i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> [shawn.guo: remove "crtcs" property from imx6qdl.dtsi] Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: add sram for imx53 and imx6qPhilipp Zabel1-0/+6
This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX6: Add i2c and spi aliasesSascha Hauer1-5/+12
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX6qdl: Add i.MX31 compatible to gpt nodeSascha Hauer1-1/+1
The i.MX6 gpt is handled by the i.MX31 gpt driver in the kernel, so add a corresponding compatible entry. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX6qdl: Add compatible and clock to flexcan nodesSascha Hauer1-0/+6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: imx6qdl: add more information for WEIMHuang Shijie1-1/+3
Add the clock and compatible information for the weim. Also adds the weim label. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: imx6qdl: remove redundant ocotp nodeShawn Guo1-5/+0
There is a redundant ocotp node. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: imx6qdl: remove redundant usbmisc labelShawn Guo1-1/+1
There is a redundant label on usbmisc node. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: i.MX6: configure L2 cache data and tag latencyDirk Behme1-0/+2
Configure the data and tag latency for the L2 cache. This improves the system performance. This configuration is taken from Freescale's kernel patch "ENGR00153601 [MX6]Adjust L2 cache parameter" [1] which does writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_TAG_LATENCY_CTRL)); writel(0x132, IO_ADDRESS(L2_BASE_ADDR + L2X0_DATA_LATENCY_CTRL)); In this patch we are doing the same via the device tree. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
2013-05-07Merge tag 'dt-for-linus-2' of ↵Linus Torvalds1-1/+7
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates (part 2) from Arnd Bergmann: "These are mostly new device tree bindings for existing drivers, as well as changes to the device tree source files to add support for those devices, and a couple of new boards, most notably Samsung's Exynos5 based Chromebook. The changes depend on earlier platform specific updates and touch the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci." * tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits) ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: add mshc controller node for Exynos4x12 SoCs ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: dts: mvebu: Convert mvebu device tree files to 64 bits ARM: dts: mvebu: introduce internal-regs node ARM: dts: mvebu: Convert all the mvebu files to use the range property ARM: dts: mvebu: move all peripherals inside soc ARM: dts: mvebu: fix cpus section indentation ARM: davinci: da850: add EHRPWM & ECAP DT node ARM/dts: OMAP3: fix pinctrl-single configuration ARM: dts: Add OMAP3430 SDP NOR flash memory binding ARM: dts: Add NOR flash bindings for OMAP2420 H4 ...
2013-05-06Merge branch 'late/dt' into next/dt2Arnd Bergmann1-0/+1
This is support for the ARM Chromebook, originally scheduled as a "late" pull request. Since it's already late now, we can combine this into the existing next/dt2 branch. * late/dt: ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
2013-05-02Merge tag 'dt-for-linus' of ↵Linus Torvalds1-2/+31
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
2013-04-09ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53Philipp Zabel1-1/+1
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus the IPU2 reset line and multi core CPU reset/enable bits. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM i.MX6q: Link system reset controller (SRC) to IPU in DTPhilipp Zabel1-0/+2
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM i.MX6q: Add LDB device to device treeSteffen Trumtrar1-0/+20
Add ldb device tree node and clock lookups. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM: i.MX6: Add clocks to GPT devicetree nodeSascha Hauer1-0/+2
The i.MX6 already has a devicetree node for the GPT, but not yet has the clocks. Add them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM: imx: use #include for all device treesShawn Guo1-1/+1
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as pinctrl settings. Use of those features will increase the readability of the device tree files. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM: dts: imx6q: add PMUDirk Behme1-0/+5
Add ARM Cortex A9 Performance Monitor Unit (PMU) support. On i.MX6 a combined interrupt on hardware line #126 is used (i.MX6 TRM: Performance Unit interrupt). For more details see Documentation/devicetree/bindings/arm/pmu.txt Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09ARM: imx: provide twd clock lookup from device treeShawn Guo1-0/+1
While booting from device tree, imx6q used to provide twd clock lookup by calling clk_register_clkdev() in clock driver. However, the commit bd60345 (ARM: use device tree to get smp_twd clock) forces DT boot to look up the clock from device tree. It causes the failure below when twd driver tries to get the clock, and hence kernel has to calibrate the local timer frequency. smp_twd: clock not found -2 ... Calibrating local timer... 396.13MHz. Fix the regression by providing twd clock lookup from device tree, and remove the unused twd clk_register_clkdev() call from clock driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-04ARM: dts: add generic DMA device tree binding for mxs-dmaShawn Guo1-1/+7
Add generic DMA device tree binding for mxs-dma. The changes include: * Add channel interrupts into DMA controller nodes * Add properties '#dma-cells' and 'dma-channels' for DMA controller nodes * And properties 'dmas' and 'dma-names' for DMA client nodes * Update mxs-dma device tree binding doc Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2013-02-10ARM: dts: add dtsi for imx6q and imx6dlShawn Guo1-277/+0
Add dtsi for imx6q and imx6dl with non-common blocks moved into there. Major differences between imx6dl and imx6q: * Dual vs. Quad cores * single vs. dual IPU * 128 vs. 256 KB OCRAM * imx6q: ECSPI5, OpenVG (GC355), SATA * imx6dl: I2C4, PXP, EPDC, LCDIF * iomuxc/pads definition Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-02-10ARM: dts: rename imx6q.dtsi to imx6qdl.dtsiShawn Guo1-0/+1077
i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition of imx6dl support. Another member of i.MX6 series i.MX6 SoloLite is different enough from the other two, so it will stand as a separate dtsi. That's why we rename to imx6qdl.dtsi not imx6.dtsi. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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