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2018-03-27arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCsGregory CLEMENT1-38/+1
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2017-08-03ARM: dts: marvell: fix PCI bus dtc warningsRob Herring1-1/+3
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17ARM: dts: mvebu: Add PWM properties to .dtsi filesAndrew Lunn1-5/+14
Add properties to the GPIO nodes for Armada 370/XP to allow them to be also used as PWM lines. Signed-off-by: Andrew Lunn <andrew@lunn.ch> URL: https://patchwork.ozlabs.org/patch/427294/ [Ralph Sennhauser: Add new compatible string marvell,armada-370-gpio] Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-01-03ARM: dts: mvebu: Correct license textAlexandre Belloni1-5/+5
The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: Fixup l2-cache DT warningGregory CLEMENT1-1/+1
l2-cache which is either an aurora-outer-cache or an aurora-system-cache has a reg property so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: Remove skeleton.dtsiGregory CLEMENT1-1/+3
The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370: Fixup pcie DT warningsGregory CLEMENT1-1/+1
PCIe has a ranges property, so the unit name should contain an address. Take the opportunity to use the node label instead of the full name. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: Use the node labelsGregory CLEMENT1-52/+53
Use the node label when possible. As a result it flattens the device tree and it makes more visible the IP blocks specific to each SoC variant. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: add node labelsGregory CLEMENT1-10/+10
As it was previously done for kirkwood, this adds missing node labels to Armada 370 and XP common and SoC specific nodes to allow to reference them more easily. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-11-19ARM: dts: armada-370-xp: move the cpurst node in the common fileGregory CLEMENT1-5/+0
The cpurst nodes are identical in armada-370.dtsi and armada-xp.dtsi files, so move it in the common armada-370-xp.dtsi file. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-08-08ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' nodeStefan Roese1-18/+16
This patch moves all Armada 370/XP/38x/39x SPI controller nodes from the 'internal-regs' node down into the 'soc' node. This is in preparation to enable the usage of the SPI direct access mode. A follow-up patch will add the static MBus mappings for the SPI devices into the 'reg' property of the SPI controller DT node. By moving these SPI controller nodes, this patch also makes use of the labels rather than keeping the tree structure. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-09-29ARM: mvebu: add crypto related nodes to armada 370 dtsiArnaud Ebalard1-0/+32
Add crypto related nodes in armada-370.dtsi. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-09-29ARM: mvebu: add CPU config registers in the Armada 370/XP Device TreeThomas Petazzoni1-0/+5
This commit adds the description of the CPU config registers in the Armada 370 and Armada XP Device Tree. Since the registers are in fact different between the two SoCs, a different compatible string is used. Note that the Armada 370 node is currently unused, but it is nonetheless added for consistency with the addition on the Armada XP side. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds1-0/+8
Pull networking fixes from David Miller: 1) mlx4 driver bug fixes (TX queue wakeups, csum complete indications) from Ido Shamay, Eran Ben Elisha, and Or Gerlitz. 2) Missing unlock in error path of PTP support in renesas driver, from Dan Carpenter. 3) Add Vitesse 8641 phy IDs to vitesse PHY driver, from Shaohui Xie. 4) Bnx2x driver bug fixes (linearization of encap packets, scratchpad parity error notifications, flow-control and speed settings) from Yuval Mintz, Manish Chopra, Shahed Shaikh, and Ariel Elior. 5) ipv6 extension header parsing in the igb chip has a HW errata, disable it. Frm Todd Fujinaka. 6) Fix PCI link state locking issue in e1000e driver, from Yanir Lubetkin. 7) Cure panics during MTU change in i40e, from Mitch Williams. 8) Don't leak promisc refs in DSA slave driver, from Gilad Ben-Yossef. 9) Add missing HAS_DMA dep to VIA Rhine driver, from Geery Uytterhoeven. 10) Make sure DMA map/unmap calls are symmetric in bnx2x driver, from Michal Schmidt. 11) Workaround for MDIO access problems in bcm7xxx devices, from FLorian Fainelli. 12) Fix races in SCTP protocol between OTTB responses and route removals, from Alexander Sverdlin. 13) Fix jumbo frame checksum issue with some mvneta devices, from Simon Guinot. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (58 commits) sock_diag: don't broadcast kernel sockets net: mvneta: disable IP checksum with jumbo frames for Armada 370 ARM: mvebu: update Ethernet compatible string for Armada XP net: mvneta: introduce compatible string "marvell, armada-xp-neta" api: fix compatibility of linux/in.h with netinet/in.h net: icplus: fix typo in constant name sis900: Trivial: Fix typos in enums stmmac: Trivial: fix typo in constant name sctp: Fix race between OOTB responce and route removal net-Liquidio: Delete unnecessary checks before the function call "vfree" vmxnet3: Bump up driver version number amd-xgbe: Add the __GFP_NOWARN flag to Rx buffer allocation net: phy: mdio-bcm-unimac: workaround initial read failures for integrated PHYs net: bcmgenet: workaround initial read failures for integrated PHYs net: phy: bcm7xxx: workaround MDIO management controller initial read bnx2x: fix DMA API usage net: via: VIA_RHINE and VIA_VELOCITY should depend on HAS_DMA net/phy: tune get_phy_c45_ids to support more c45 phy bnx2x: fix lockdep splat net: fec: don't access RACC register when not available ...
2015-06-30ARM: mvebu: update Ethernet compatible string for Armada XPSimon Guinot1-0/+8
This patch updates the Ethernet DT nodes for Armada XP SoCs with the compatible string "marvell,armada-xp-neta". Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Fixes: 77916519cba3 ("arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces") Cc: <stable@vger.kernel.org> # v3.8+ Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-05-27ARM: mvebu: use improved armada spi device tree compatible name for each SoCGregory CLEMENT1-0/+4
Use the new compatible introduced in order to benefit of a wider and more accurate range of baud rates to be used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-03-19ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-levelGregory CLEMENT1-0/+1
For L2 cache controller node, cache-level property is mandatory. Let's add it to Armada 370 and Armada XP device tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-03-04ARM: mvebu: fix unit address of MPIC nodesThomas Petazzoni1-1/+1
The Device Tree nodes describing the MPIC nodes on Armada 370, 375, 38x and XP had a unit address that did not match the first reg property, as suggested by the ePAPR. This commit fixes that. [gregory.clement@free-electrons.com: removed the armada-38x part, as it was already applied by a previous patch] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-01-26ARM: mvebu: armada-370: Relicense the device tree under GPLv2+/X11Gregory CLEMENT1-3/+37
The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Ryan Press <ryan@presslab.us> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2014-11-22arm: mvebu: define and use common Armada 370 UART pinctrl settingsArnaud Ebalard1-0/+25
This patch defines common Armada 370 pinctrl settings for uart0 and uart1 interfaces: uart0: MPP0-1 as default uart1: MPP41-42 as default Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their uart interfaces if the default above does not match their config. Suggested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/31412e57955c98bc9cc47b70726b5072af945cc3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-22arm: mvebu: define and use common Armada 370 SPI pinctrl settingsArnaud Ebalard1-0/+32
This patch defines common Armada 370 pinctrl settings for spi0 and spi1 interfaces: spi0: MPP33-36 as default, MPP32,63-65 as available alternate config spi1: MPP49-52 as default Currently, the Armada 370 DB .dts file has no explicit pinctrl info for the spi0 interface used to access the flash on the board. The patch fixes that by also adding explicit pinctrl info (MPP32,63-65) for this SPI interface. Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config. Suggested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/1e812eb63b37718e273463e22e4d7512f8f0b624.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-22arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsiArnaud Ebalard1-61/+60
What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address") and 01c434225ee6 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e. - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded - Add a node alias to access the pinctrl node easily. - use the newly available alias in existing Armada 370 .dts files We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi. Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Suggested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-22ARM: mvebu: fix ordering in Armada 370 .dtsiUwe Kleine-König1-5/+5
Commit a095b1c78a35 ("ARM: mvebu: sort DT nodes by address") missed placing the system-controller in the correct order. Fixes: a095b1c78a35 ("ARM: mvebu: sort DT nodes by address") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/20141114204333.GS27002@pengutronix.de Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-07ARM: mvebu: use simple-card DT binding for audio on Armada 370 DBThomas Petazzoni1-0/+1
This commit modifies the Armada 370 and Armada 370 DB Device Tree descriptions to use the simple-card DT binding to describe the audio complex of the Armada 370 DB instead of a custom audio machine driver. To do so, it: - Adds the sound-dai-cells properties to the CS42L51 node, the audio controller node and the SPDIF in/out nodes. - Completely changes the description of the sound complex to use the "simple-audio-card" DT binding instead of the "marvell,a370db-audio" DT binding. - Fixes the indentation to properly use tabs instead of spaces. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1414512524-24466-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-01ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified ↵Gregory CLEMENT1-0/+1
property The L2 cache controller on the Armada 370 and Armada XP SoCs is a unified cache. Moreover, the Aurora cache controller is compatible with the L2x0 cache controller: the "cache-unified" property is required by its binding. This patch fixes the Aurora L2 cache node for the Armada 370 and Armada XP SoCs by adding this property. Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-09-09ARM: mvebu: add SSCG to Armada 370 Device TreeGregory CLEMENT1-0/+4
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit adds the description of this generator to the Device Tree describing this SoC. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Leigh Brown <leigh@solinno.co.uk> Link: https://lkml.kernel.org/r/1409645719-20003-4-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-08-17ARM: mvebu: Add network pin mux configuration for the Armada 370 SoCEzequiel Garcia1-0/+19
This commit adds the pin mux configuration for the two network interfaces and the MDIO interface in the Armada 370 SoC .dtsi file. Only the configuration for RGMII is added for now. Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1407759281-11513-2-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-24ARM: mvebu: switch to the new PMSU binding in Armada 370/XP Device TreeGregory CLEMENT1-0/+5
Following the introduction of the new PMSU Device Tree binding, as well as the separate CPU reset binding, this commit switches the Armada 370 and Armada XP Device Trees to use them. The PMSU node is moved from the Armada XP specific armada-xp.dtsi to the common Armada 370/XP armada-370-xp.dtsi because the PMSU is in fact available at the same location on both SOCs. The CPU reset node is then added on both Armada 370 and Armada XP, with a different compatible string. On Armada 370, the CPU reset driver is not really needed as Armada 370 is single core and the only use of the CPU reset driver is to boot secondary processors, but it still makes sense to have this CPU reset register described in the Device Tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17ARM: mvebu: Enable Armada 370/XP watchdog in the devicetreeEzequiel Garcia1-0/+5
Add the DT nodes to enable watchdog support available in Armada 370 and Armada XP SoCs. Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17ARM: mvebu: add I2C0 muxing option for Armada 370 SoCThomas Petazzoni1-0/+5
This commit adds a pin-muxing configuration for the I2C0 bus of the Armada 370, which is used on the Armada 370 DB platform to interface with the CS42L51 audio codec. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17ARM: mvebu: add audio I2S controller to Armada 370 Device TreeThomas Petazzoni1-0/+23
The Armada 370 SoC has an I2S audio controller. This commit adds the description of this controller to the Device Tree describing this SoC, as well as two possible muxing configurations for the I2S bus pins. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-12-12ARM: mvebu: sort DT nodes by addressJason Cooper1-37/+37
Prevent future unnecessary merge conflicts Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-09-30ARM: mvebu: link PCIe controllers to the MSI controllerThomas Petazzoni1-0/+1
This commit adjusts the Armada 370 and Armada XP PCIe controllers Device Tree informations to reference their MSI controller. In the case of this platform, the MSI controller is implemented by the MPIC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Daniel Price <daniel.price@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-09-17ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2cGregory CLEMENT1-0/+8
The mv64xxx-i2c embedded in the Armada XP have a new feature to offload i2c transaction. This new version of the IP come also with some errata. This lead to the introduction to a another compatible string. This commit split the i2c information into armada-370.dtsi and armada-xp.dtsi. Most of the data remains the same and stay in the common file Armada-370-xp.dtsi. With this new feature the size of the registers are bigger for Armada XP and the new compatible string is used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-29Merge tag 'dt-3.12' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson1-3/+8
From Jason Cooper: mvebu dt changes for v3.12 - kirkwood - add ZyXEL NSA310 board, fan for ReadyNAS Duo v2 - mvebu - add ReadyNAS 102 board - misc dts updates and changes. v2: - dropped mv64xxx-i2c change * tag 'dt-3.12' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the Armada 370/XP timer compatible strings ARM: mvebu: use dts pre-processor for readynas 102 ARM: kirkwood: use dts pre-processor for nsa310 boards ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells ARM: Kirkwood: Add support for another ZyXEL NSA310 variant ARM: mvebu: Add Netgear ReadyNAS 102 board arm: kirkwood: readynas duo v2: Add GMT G762 Fan Controller Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/kirkwood-nsa310.dts
2013-08-16ARM: mvebu: Fix the Armada 370/XP timer compatible stringsEzequiel Garcia1-0/+5
The "marvell,armada-370-xp-timer" compatible string, together with the "marvell,timer-25Mhz" property are deprecated and should be removed from current DT. Instead, the timer DT nodes are now required to have an appropriate compatible string, which should be either "marvell,armada-370-timer" or "marvell,armada-xp-timer", depending on SoC. The clock property is now required only for Armada 370 so move it accordingly. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-16ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cellsThomas Petazzoni1-3/+3
The Device Tree information for the GPIO banks of the Armada 370 and Armada XP SOCs was incorrectly using #interrupts-cells instead of controller when using GPIO interrupts, since the GPIO bank DT node wasn't recognized as a valid interrupt controller by the OF code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-06ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodesEzequiel Garcia1-48/+53
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-06ARM: mvebu: Add BootROM to Armada 370/XP device treeEzequiel Garcia1-0/+5
In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-06ARM: mvebu: Add MBus to Armada 370/XP device treeEzequiel Garcia1-2/+2
The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-06ARM: mvebu: Use the preprocessor on Armada 370/XP device tree filesEzequiel Garcia1-1/+1
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-06-14Merge tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux into ↵Olof Johansson1-4/+0
next/dt From Jason Cooper: mvebu dt changes for v3.11 (round 5) - mvebu - set aliases for ethernet interfaces - PCIe range for armada-xp-db - rm unused properties on A370 - kirkwood - assign sheevaplug pinmuxs to correct devices - enable second PCIe port for ts219 * tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: ts219: Enable second PCIe port in DT. ARM: mvebu: Remove device tree unused properties on A370 arm: mvebu: armada-xp-db: ensure PCIe range is specified arm: kirkwood: sheevaplug: move pinmux configs to the right devices ARM: mvebu: set aliases for ethernet controllers Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-08ARM: mvebu: Remove device tree unused properties on A370Ezequiel Garcia1-4/+0
These properties are not needed so it's safe to remove them. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-20ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache nodeGregory CLEMENT1-1/+1
During the conversion to the internal-regs' subnode, the L2-cache node haven not been converted (due to a wrong choice made by myself during the resolution of the merge conflict when I rebased the commit). This leads to wrong address for L2 cache which prevent it to be used on Armada 370. This commit fix the address reg of the e L2-cache node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-19arm: mvebu: fix the 'ranges' property to handle PCIeThomas Petazzoni1-1/+2
Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use the range property') all the device nodes of Armada 370/XP are under a common 'ranges' property that translates the device register addresses into their absolute address, thanks to the base address of the internal register space. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-13ARM: mvebu: do not duplicate the mpic aliasThomas Petazzoni1-1/+1
The mpic alias is already defined in the common armada-370-xp.dtsi, so there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi level. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: Convert mvebu device tree files to 64 bitsGregory CLEMENT1-0/+2
In order to be able to use more than 4GB of RAM when the LPAE is activated, the dts must be converted in 64 bits. Only Armada XP is LPAE capable, but as it shares a common dtsi file with Armada 370, then the common file include the skeleton64. Thanks to the use of the overload capability of the device tree format, armada-370 include the 32 bit skeleton and all the armada 370 based dts can remain the same. This was heavily based on the work of Lior Amsalem. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: introduce internal-regs nodeGregory CLEMENT1-164/+164
Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: Convert all the mvebu files to use the range propertyGregory CLEMENT1-32/+33
This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15ARM: dts: mvebu: move all peripherals inside socThomas Petazzoni1-11/+12
reorganize the .dts and .dtsi files so that all devices are under the soc { } node (currently some devices such as the interrupt controller, the L2 cache and a few others are outside). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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