| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-08-21 | ARC: Eliminate some ARCv2 specific code for ARCompact build | Vineet Gupta | 1 | -26/+32 |
| 2015-08-20 | ARCv2: IOC: Allow boot time disable | Alexey Brodkin | 1 | -3/+4 |
| 2015-08-20 | ARCv2: SLC: Allow boot time disable | Vineet Gupta | 1 | -2/+19 |
| 2015-08-20 | ARCv2: Support IO Coherency and permutations involving L1 and L2 caches | Alexey Brodkin | 1 | -16/+98 |
| 2015-07-06 | ARCv2: guard SLC DMA ops with spinlock | Alexey Brodkin | 1 | -2/+10 |
| 2015-06-25 | ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency) | Vineet Gupta | 1 | -2/+62 |
| 2015-06-22 | ARCv2: MMUv4: support aliasing icache config | Vineet Gupta | 1 | -1/+13 |
| 2015-06-22 | ARCv2: MMUv4: cache programming model changes | Vineet Gupta | 1 | -15/+97 |
| 2015-06-19 | ARC: untangle cache flush loop | Vineet Gupta | 1 | -25/+55 |
| 2015-06-19 | ARC: cacheflush: No need to retain DC_CTRL from __before_dc_op() | Vineet Gupta | 1 | -20/+19 |
| 2015-06-19 | ARC: cacheflush: move some code around, delete old comments | Vineet Gupta | 1 | -165/+102 |
| 2015-06-19 | ARC: mm/cache_arc700.c -> mm/cache.c | Vineet Gupta | 1 | -0/+723 |
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index : linux | |
| Linux Kernel (branches are rebased on master from time to time) | Linus Torvalds |
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