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path: root/arch/arc/mm/cache.c
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2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2019-04-02ARC: PAE40: don't panic and instead turn off hw iocVineet Gupta1-15/+16
2018-12-28Merge tag 'dma-mapping-4.21' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds1-1/+1
2018-12-13dma-mapping: bypass indirect calls for dma-directChristoph Hellwig1-1/+1
2018-11-12ARC: IOC: panic if kernel was started with previously enabled IOCEugeniy Paltsev1-3/+17
2018-09-04ARC: IOC: panic if both IOC and ZONE_HIGHMEM enabledEugeniy Paltsev1-0/+13
2018-09-04ARC: dma [IOC] Enable per device io coherencyEugeniy Paltsev1-15/+8
2018-07-30arc: fix type warnings in arc/mm/cache.cRandy Dunlap1-3/+4
2018-07-30ARC: add SMP_CACHE_BYTES value validateEugeniy Paltsev1-0/+10
2018-04-05mm: fix races between swapoff and flush dcacheHuang Ying1-1/+1
2018-01-17ARCv2: cache: fix slc_entire_op: flush only instead of flush-n-invEugeniy Paltsev1-1/+4
2017-09-01ARC: mm: Decouple RAM base address from kernel link addressEugeniy Paltsev1-1/+1
2017-09-01ARCv2: IOC: Tighten up the contraints (specifically base / size alignment)Eugeniy Paltsev1-8/+19
2017-08-30ARCv2: SLC: provide a line based flush routine for debuggingVineet Gupta1-1/+53
2017-08-28ARC: set boot print log level to PR_INFONoam Camus1-1/+1
2017-08-04ARCv2: PAE40: set MSB even if !CONFIG_ARC_HAS_PAE40 but PAE exists in SoCVineet Gupta1-6/+28
2017-08-04ARCv2: PAE40: Explicitly set MSB counterpart of SLC region ops addressesAlexey Brodkin1-2/+11
2017-08-04ARCv2: SLC: Make sure busy bit is set properly for region opsAlexey Brodkin1-0/+3
2017-05-02ARCv2: mm: Merge 2 updates to DC_CTRL for region flushVineet Gupta1-14/+32
2017-05-02ARCv2: mm: Implement cache region flush operationsVineet Gupta1-0/+68
2017-05-02ARC: mm: Move full_page computation into cache version agnostic wrapperVineet Gupta1-13/+12
2017-03-30ARCv2: SLC: Make sure busy bit is set properly on SLC flushingAlexey Brodkin1-0/+3
2017-01-18ARC: Revert "ARC: mm: IOC: Don't enable IOC by default"Vineet Gupta1-1/+1
2017-01-18ARC: mm: split arc_cache_init to allow __init reaping of bulkVineet Gupta1-14/+19
2017-01-18ARCv2: IOC: Use actual memory size to setup aperture sizeVineet Gupta1-2/+10
2017-01-18ARCv2: IOC: Adhere to progamming model guidelines to avoid DMA corruptionVineet Gupta1-0/+46
2017-01-18ARCv2: IOC: refactor the IOC and SLC operations into own functionsVineet Gupta1-21/+47
2017-01-04ARC: mmu: clarify the MMUv3 programming modelVineet Gupta1-1/+5
2016-12-19ARC: mm: arc700: Don't assume 2 colours for aliasing VIPT dcacheVineet Gupta1-4/+9
2016-12-19ARC: mm: No need to save cache version in @cpuinfoVineet Gupta1-11/+4
2016-11-28ARC: mm: IOC: Don't enable IOC by defaultVineet Gupta1-1/+1
2016-10-28ARCv2: boot log: print IOC exists as well as enabled statusVineet Gupta1-6/+3
2016-10-24ARCv2: IOC: use @ioc_enable not @ioc_exist where intendedVineet Gupta1-4/+6
2016-09-30ARCv2: Support dynamic peripheral address space in HS38 rel 3.0 coresVineet Gupta1-5/+18
2016-08-10ARC: Elide redundant setup of DMA callbacksVineet Gupta1-0/+9
2016-05-30Fix typosAndrea Gelmini1-3/+3
2016-04-04mm, fs: get rid of PAGE_CACHE_* and page_cache_{get,release} macrosKirill A. Shutemov1-1/+1
2016-03-19ARCv2: ioremap: Support dynamic peripheral address spaceVineet Gupta1-0/+7
2016-03-19ARC: dma: ioremap: use phys_addr_t consistenctly in code pathsVineet Gupta1-15/+15
2016-03-11ARC: Fix misspellings in comments.Adam Buchbinder1-1/+1
2016-01-15mm: differentiate page_mapped() from page_mapcount() for compound pagesKirill A. Shutemov1-2/+2
2015-10-29ARC: mm: PAE40 supportVineet Gupta1-4/+40
2015-10-28ARC: mm: PAE40: switch to using phys_addr_t for physical addressesVineet Gupta1-13/+13
2015-10-28ARC: mm: preps ahead of HIGHMEM supportVineet Gupta1-5/+11
2015-10-17ARC: boot log: move helper macros to header for reuseVineet Gupta1-3/+2
2015-08-21ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta1-26/+32
2015-08-20ARCv2: IOC: Allow boot time disableAlexey Brodkin1-3/+4
2015-08-20ARCv2: SLC: Allow boot time disableVineet Gupta1-2/+19
2015-08-20ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin1-16/+98
2015-07-06ARCv2: guard SLC DMA ops with spinlockAlexey Brodkin1-2/+10
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