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2020-04-12arc: ptrace: hard-code "arc" instead of UTS_MACHINEMasahiro Yamada1-3/+0
ARC uses the UTS_MACHINE defined in the top Makefile as follows: UTS_MACHINE := $(ARCH) We know it is "arc" when we are building the kernel for ARC. Hard-code user_regset_view::name, like many other architectures do. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-01-17ARCv2: fpu: preserve userspace fpu stateVineet Gupta1-0/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2019-11-08ARC: ARCv2: jump label: implement jump label patchingEugeniy Paltsev1-0/+1
Implement jump label patching for ARC. Jump labels provide an interface to generate dynamic branches using self-modifying code. This allows us to implement conditional branches where changing branch direction is expensive but branch selection is basically 'free' This implementation uses 32-bit NOP and BRANCH instructions which forced to be aligned by 4 to guarantee that they don't cross L1 cache line boundary and can be update atomically. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-3/+1
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-02ARC: Remove empty kernel/pcibios.cPalmer Dabbelt1-1/+0
ARC requires no arch-specific pcibios hooks, so delete this empty file. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-11-30clocksource: import ARC timer driverVineet Gupta1-1/+1
This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Link: http://lkml.kernel.org/r/20161111231132.GA4186@mai Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-09ARC: RIP arc_{get|set}_core_freq() clk APIAlexey Brodkin1-1/+1
There are no more users of this - so RIP! Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> [vgupta: update changelog] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-03-10ARC: Add PCI supportJoao Pinto1-0/+1
Add PCI support to ARC and update drivers/pci Makefile enabling the ARC arch to use the generic PCI setup functions. [bhelgaas: fold in Joao's pci-dma-compat.h & pci-bridge.h build fix (I should have caught this myself, sorry] Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta1-0/+1
Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta1-1/+2
The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-19ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta1-1/+1
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-19ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta1-2/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-10-13ARC: rename kconfig option for unaligned emulationVineet Gupta1-1/+1
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-12ARC: Add perf support for ARC700 coresMischa Jonker1-0/+1
This adds basic perf support for ARC700 cores. Most PERF_COUNT_HW* events are supported now. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15ARC: Hostlink Pseudo-Driver for Metaware DebuggerVineet Gupta1-0/+1
This allows ARC Target to do I/O to host in absence of any peripherals whatsoever, assisted by Metaware Hostlink facility. Further we have a FUSE based filesystem which makes us mount/access host filesystem on target and do fops. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15ARC: kgdb supportMischa Jonker1-0/+1
Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Jason Wessel <jason.wessel@windriver.com> Acked-by: Jason Wessel <jason.wessel@windriver.com>
2013-02-15ARC: Unaligned access emulationVineet Gupta1-0/+1
ARC700 doesn't natively support unaligned access, but can be emulated -Unaligned Access Exception -Disassembly at the Fault address to find the exact insn (long/short) Also per Arnd's comment, we runtime control it using 2 sysctl knobs: * SYSCTL_ARCH_UNALIGN_ALLOW: Runtime enable/disble * SYSCTL_ARCH_UNALIGN_NO_WARN: Warn on each emulation attempt Originally contributed by Tim Yao <tim.yao@amlogic.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Tim Yao <tim.yao@amlogic.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15ARC: kprobes supportVineet Gupta1-0/+1
Origin port done by Rajeshwar Ranga Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
2013-02-15ARC: disassembly (needed by kprobes/kgdb/unaligned-access-emul)Vineet Gupta1-1/+1
In-kernel disassembler Due Credits * Orig written by Rajeshwar Ranga * Consolidation/cleanups by Mischa Jonker Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Mischa Jonker <mjonker@synopsys.com>
2013-02-15ARC: DWARF2 .debug_frame based stack unwinderVineet Gupta1-0/+6
-Originally written by Rajeshwar Ranga -Derived off of generic unwinder in 2.6.19 and adapted to ARC Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
2013-02-15ARC: SMP supportVineet Gupta1-0/+1
ARC common code to enable a SMP system + ISS provided SMP extensions. ARC700 natively lacks SMP support, hence some of the core features are are only enabled if SoCs have the necessary h/w pixie-dust. This includes: -Inter Processor Interrupts (IPI) -Cache coherency -load-locked/store-conditional ... The low level exception handling would be completely broken in SMP because we don't have hardware assisted stack switching. Thus a fair bit of this code is repurposing the MMU_SCRATCH reg for event handler prologues to keep them re-entrant. Many thanks to Rajeshwar Ranga for his initial "major" contributions to SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help with resurrecting that in 3.2 kernel (2012). Note that this platform code is again singleton design pattern - so multiple SMP platforms won't build at the moment - this deficiency is addressed in subsequent patches within this series. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com> Cc: Noam Camus <noamc@ezchip.com> Cc: Gilad Ben-Yossef <gilad@benyossef.com>
2013-02-15ARC: Module supportVineet Gupta1-0/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15ARC: ptrace supportVineet Gupta1-0/+3
Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-02-15ARC: [DeviceTree] Basic supportVineet Gupta1-0/+1
This is minimal infrastructure needed for devicetree work. It uses an a sample "skeleton" devicetree - embedded in kernel image - to print the board, manufacturer by parsing the top-level "compatible" string. As of now we don't need any additional "board" specific "machine_desc". TODO: support interpreting the command line as boot-loader passed dtb Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: James Hogan <james.hogan@imgtec.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: James Hogan <james.hogan@imgtec.com>
2013-02-11ARC: Build system: Makefiles, Kconfig, Linker scriptVineet Gupta1-0/+16
Arnd in his review pointed out that arch Kconfig organisation has several deficiencies: * Build time entries for things which can be runtime extracted from DT (e.g. SDRAM size, core clk frequency..) * Not multi-platform-image-build friendly (choice .. endchoice constructs) * cpu variants support (750/770) is exclusive. The first 2 have been fixed in subsequent patches. Due to the nature of the 750 and 770, it is not possible to build for both together, w/o special runtime glue code which would hurt performance. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Sam Ravnborg <sam@ravnborg.org> Acked-by: Sam Ravnborg <sam@ravnborg.org>
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