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2020-10-12Merge tag 'x86_cache_for_v5.10' of ↵Linus Torvalds1-2/+16
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cache resource control updates from Borislav Petkov: - Misc cleanups to the resctrl code in preparation for the ARM side (James Morse) - Add support for controlling per-thread memory bandwidth throttling delay values on hw which supports it (Fenghua Yu) * tag 'x86_cache_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/resctrl: Enable user to view thread or core throttling mode x86/resctrl: Enumerate per-thread MBA controls cacheinfo: Move resctrl's get_cache_id() to the cacheinfo header file x86/resctrl: Add struct rdt_cache::arch_has_{sparse, empty}_bitmaps x86/resctrl: Merge AMD/Intel parse_bw() calls x86/resctrl: Add struct rdt_membw::arch_needs_linear to explain AMD/Intel MBA difference x86/resctrl: Use is_closid_match() in more places x86/resctrl: Include pid.h x86/resctrl: Use container_of() in delayed_work handlers x86/resctrl: Fix stale comment x86/resctrl: Remove struct rdt_membw::max_delay x86/resctrl: Remove unused struct mbm_state::chunks_bw
2020-10-12Merge tag 'x86_fpu_for_v5.10' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fpu updates from Borislav Petkov: - Allow clearcpuid= to accept multiple bits (Arvind Sankar) - Move clearcpuid= parameter handling earlier in the boot, away from the FPU init code and to a generic location (Mike Hommey) * tag 'x86_fpu_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu: Handle FPU-related and clearcpuid command line arguments earlier x86/fpu: Allow multiple bits in clearcpuid= parameter
2020-10-12Merge tag 'x86_misc_for_v5.10' of ↵Linus Torvalds2-0/+156
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 fixes fromm Borislav Petkov: - Ratelimit the message about writes to unrecognized MSRs so that they don't spam the console log (Chris Down) - Document how the /proc/cpuinfo machinery works for future reference (Kyung Min Park, Ricardo Neri and Dave Hansen) - Correct the current NMI's duration calculation (Libing Zhou) * tag 'x86_misc_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/nmi: Fix nmi_handle() duration miscalculation Documentation/x86: Add documentation for /proc/cpuinfo feature flags x86/msr: Make source of unrecognised MSR writes unambiguous x86/msr: Prevent userspace MSR access from dominating the console
2020-10-12Merge tag 'x86_pasid_for_5.10' of ↵Linus Torvalds2-0/+258
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 PASID updates from Borislav Petkov: "Initial support for sharing virtual addresses between the CPU and devices which doesn't need pinning of pages for DMA anymore. Add support for the command submission to devices using new x86 instructions like ENQCMD{,S} and MOVDIR64B. In addition, add support for process address space identifiers (PASIDs) which are referenced by those command submission instructions along with the handling of the PASID state on context switch as another extended state. Work by Fenghua Yu, Ashok Raj, Yu-cheng Yu and Dave Jiang" * tag 'x86_pasid_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/asm: Add an enqcmds() wrapper for the ENQCMDS instruction x86/asm: Carve out a generic movdir64b() helper for general usage x86/mmu: Allocate/free a PASID x86/cpufeatures: Mark ENQCMD as disabled when configured out mm: Add a pasid member to struct mm_struct x86/msr-index: Define an IA32_PASID MSR x86/fpu/xstate: Add supervisor PASID state for ENQCMD x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Documentation/x86: Add documentation for SVA (Shared Virtual Addressing) iommu/vt-d: Change flags type to unsigned int in binding mm drm, iommu: Change type of pasid to u32
2020-10-12Merge tag 'edac_updates_for_v5.10' of ↵Linus Torvalds1-0/+67
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: - Add Amazon's Annapurna Labs memory controller EDAC driver (Talel Shenhar) - New AMD CPUs support (Yazen Ghannam) - The usual misc fixes and cleanups all over the subsystem * tag 'edac_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/amd64: Set proper family type for Family 19h Models 20h-2Fh EDAC/mc_sysfs: Add missing newlines when printing {max,dimm}_location EDAC/aspeed: Use module_platform_driver() to simplify EDAC, sb_edac: Simplify switch statement EDAC/ti: Fix handling of platform_get_irq() error EDAC/aspeed: Fix handling of platform_get_irq() error EDAC/i5100: Fix error handling order in i5100_init_one() EDAC/highbank: Handover Calxeda Highbank maintenance to Andre Przywara EDAC/socfpga: Transfer SoCFPGA EDAC maintainership EDAC/thunderx: Make symbol lmc_dfs_ents static EDAC/al-mc-edac: Add Amazon's Annapurna Labs Memory Controller driver dt-bindings: EDAC: Add Amazon's Annapurna Labs Memory Controller binding EDAC/mce_amd: Add new error descriptions for existing types EDAC: Replace HTTP links with HTTPS ones
2020-10-12Merge tag 'arm64-upstream' of ↵Linus Torvalds8-3/+438
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "There's quite a lot of code here, but much of it is due to the addition of a new PMU driver as well as some arm64-specific selftests which is an area where we've traditionally been lagging a bit. In terms of exciting features, this includes support for the Memory Tagging Extension which narrowly missed 5.9, hopefully allowing userspace to run with use-after-free detection in production on CPUs that support it. Work is ongoing to integrate the feature with KASAN for 5.11. Another change that I'm excited about (assuming they get the hardware right) is preparing the ASID allocator for sharing the CPU page-table with the SMMU. Those changes will also come in via Joerg with the IOMMU pull. We do stray outside of our usual directories in a few places, mostly due to core changes required by MTE. Although much of this has been Acked, there were a couple of places where we unfortunately didn't get any review feedback. Other than that, we ran into a handful of minor conflicts in -next, but nothing that should post any issues. Summary: - Userspace support for the Memory Tagging Extension introduced by Armv8.5. Kernel support (via KASAN) is likely to follow in 5.11. - Selftests for MTE, Pointer Authentication and FPSIMD/SVE context switching. - Fix and subsequent rewrite of our Spectre mitigations, including the addition of support for PR_SPEC_DISABLE_NOEXEC. - Support for the Armv8.3 Pointer Authentication enhancements. - Support for ASID pinning, which is required when sharing page-tables with the SMMU. - MM updates, including treating flush_tlb_fix_spurious_fault() as a no-op. - Perf/PMU driver updates, including addition of the ARM CMN PMU driver and also support to handle CPU PMU IRQs as NMIs. - Allow prefetchable PCI BARs to be exposed to userspace using normal non-cacheable mappings. - Implementation of ARCH_STACKWALK for unwinding. - Improve reporting of unexpected kernel traps due to BPF JIT failure. - Improve robustness of user-visible HWCAP strings and their corresponding numerical constants. - Removal of TEXT_OFFSET. - Removal of some unused functions, parameters and prototypes. - Removal of MPIDR-based topology detection in favour of firmware description. - Cleanups to handling of SVE and FPSIMD register state in preparation for potential future optimisation of handling across syscalls. - Cleanups to the SDEI driver in preparation for support in KVM. - Miscellaneous cleanups and refactoring work" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (148 commits) Revert "arm64: initialize per-cpu offsets earlier" arm64: random: Remove no longer needed prototypes arm64: initialize per-cpu offsets earlier kselftest/arm64: Check mte tagged user address in kernel kselftest/arm64: Verify KSM page merge for MTE pages kselftest/arm64: Verify all different mmap MTE options kselftest/arm64: Check forked child mte memory accessibility kselftest/arm64: Verify mte tag inclusion via prctl kselftest/arm64: Add utilities and a test to validate mte memory perf: arm-cmn: Fix conversion specifiers for node type perf: arm-cmn: Fix unsigned comparison to less than zero arm64: dbm: Invalidate local TLB when setting TCR_EL1.HD arm64: mm: Make flush_tlb_fix_spurious_fault() a no-op arm64: Add support for PR_SPEC_DISABLE_NOEXEC prctl() option arm64: Pull in task_stack_page() to Spectre-v4 mitigation code KVM: arm64: Allow patching EL2 vectors even with KASLR is not enabled arm64: Get rid of arm64_ssbd_state KVM: arm64: Convert ARCH_WORKAROUND_2 to arm64_get_spectre_v4_state() KVM: arm64: Get rid of kvm_arm_have_ssbd() KVM: arm64: Simplify handling of ARCH_WORKAROUND_2 ...
2020-10-12Merge tag 'tpmdd-next-v5.10' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd Pull tpm updates from Jarkko Sakkinen: "Support for a new TPM device and fixes and Git URL change (infraded -> korg)" * tag 'tpmdd-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd: MAINTAINERS: TPM DEVICE DRIVER: Update GIT tpm_tis: Add a check for invalid status tpm: use %*ph to print small buffer dt-bindings: Add SynQucer TPM MMIO as a trivial device tpm: tis: add support for MMIO TPM on SynQuacer
2020-10-12dt-bindings: Add running yamllint to dt_binding_checkRob Herring2-1/+47
Add a yamllint config file and support for running yamllint on DT binding schema files. This runs on the whole tree as yamllint is Python and suffers from Python's slow startup times. Users can run on individual files doing: yamllint -c Documentation/devicetree/bindings/.yamllint <binding file> Link: https://lore.kernel.org/r/20201009170557.168785-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-12Merge branch 'efi/urgent' into efi/core, to pick up fixesIngo Molnar1-4/+1
These fixes missed the v5.9 merge window, pick them up for early v5.10 merge. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-10-12Merge branch 'printk-rework' into for-linusPetr Mladek2-79/+211
2020-10-11Merge tag 'x86-urgent-2020-10-11' of ↵Linus Torvalds1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "Two fixes: - Fix a (hopefully final) IRQ state tracking bug vs MCE handling - Fix a documentation link" * tag 'x86-urgent-2020-10-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Documentation/x86: Fix incorrect references to zero-page.txt x86/mce: Use idtentry_nmi_enter/exit()
2020-10-11Merge tag 'irqchip-5.10' of ↵Thomas Gleixner4-1/+300
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates from Marc Zyngier: Core changes: - Allow irq retriggering to follow a hierarchy - Allow interrupt hierarchies to be trimmed at allocation time - Allow interrupts to be hidden from /proc/interrupts (IPIs) - Introduce stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER - New per-cpu IPI handling flow Architecture changes: - Move arm/arm64 IPI handling to the core interrupt code, removing the home brewed accounting Driver updates: - New driver for the MStar (and more recently Mediatek) platforms - New driver for the Actions Owl SIRQ controller - New driver for the TI PRUSS infrastructure - Wake-up support for the Qualcomm PDC controller - Primary interrupt controller support for the Designware APB ICTL - Convert the IPI code for GIC, GICv3, hip04, armada-270-xp and bcm2836 to using standard interrupts - Improve GICv3 pseudo-NMI support to deal with both non-secure and secure priorities on arm64 - Convert the GIC/GICv3 drivers to using HW-based irq retrigger - A sprinkling of dev_err_probe() conversion - A set of NVIDIA Tegra fixes for interrupt hierarchy corruption - A reset fix for the Loongson HTVEC driver - A couple of error handling fixes in the TI SCI drivers
2020-10-10Merge branch 'irq/mstar' into irq/irqchip-nextMarc Zyngier1-0/+64
Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-10-10dt-bindings: interrupt-controller: Add MStar interrupt controllerMark-PK Tsai1-0/+64
Add binding for MStar interrupt controller. Signed-off-by: Mark-PK Tsai <mark-pk.tsai@mediatek.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200902063344.1852-3-mark-pk.tsai@mediatek.com
2020-10-09Documentation: better locations for sysfs-pci, sysfs-taggingJohn Hubbard5-2/+2
sysfs-pci and sysfs-tagging were mis-filed: their locations within Documentation/ implied that they were related to file systems. Actually, each topic is about a very specific *use* of sysfs, and sysfs *happens* to be a (virtual) filesystem, so this is not really the right place. It's jarring to be reading about filesystems in general and then come across these specific details about PCI, and tagging...and then back to general filesystems again. Move sysfs-pci to PCI, and move sysfs-tagging to networking. (Thanks to Jonathan Corbet for coming up with the final locations.) Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://lore.kernel.org/r/20201009070128.118639-1-jhubbard@nvidia.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-10-09Merge remote-tracking branch 'spi/for-5.10' into spi-nextMark Brown7-49/+143
2020-10-09Merge branch 'locking/urgent' into locking/core, to pick up fixesIngo Molnar54-345/+501
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-10-08spi: dw: Add Baikal-T1 SPI Controller bindingsSerge Semin1-2/+31
These controllers are based on the DW APB SSI IP-core and embedded into the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4 native CS, while another one as being utilized by the Baikal-T1 System Boot Controller has got a very limited resources: no IRQ, no DMA, only a single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's why we have to mark the IRQ to be optional for the later interface. The SPI controller embedded into the Baikal-T1 System Boot Controller can be also used to directly access an external SPI flash by means of a dedicated FSM. The corresponding MMIO region availability is switchable by the embedded multiplexor, which phandle can be specified in the dts node. * We added a new example to test out the non-standard Baikal-T1 System Boot SPI Controller DT binding. Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201007235511.4935-21-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-08docs: gpio: add a new document to its index.rstMauro Carvalho Chehab1-0/+1
There's now a new ReST file. Add it to the index.rst file. Fixes: ce7a2f77f976 ("docs: gpio: Add GPIO Aggregator documentation") Fixes: 2fd1abe99e5f ("Documentation: gpio: add documentation for gpio-mockup") Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Link: https://lore.kernel.org/r/bad4d85c218d59c1bf69157df8e1012577680d88.1601616399.git.mchehab+huawei@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-10-08dt-bindings: powerpc: Add a schema for the 'sleep' propertyRob Herring1-0/+47
Document the PowerPC specific 'sleep' property as a schema. It is currently only documented in booting-without-of.rst which is getting removed. Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201008142420.2083861-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-08dt-bindings: pinctrl: sirf: Fix typo abitraryNaoki Hayama1-1/+1
Fix comment typo. s/abitrary/arbitrary/ Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp> Link: https://lore.kernel.org/r/614fe604-ab8e-21cb-0c3a-db6ddeff2a4e@lineo.co.jp Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-08dt-bindings: pinctrl: qcom: Fix typo abitraryNaoki Hayama1-1/+1
Fix comment typo. s/abitrary/arbitrary/ Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp> Link: https://lore.kernel.org/r/7d1856e2-84c7-ab19-863d-2d500569d58c@lineo.co.jp Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-08PNP: remove the now unused pnp_find_card() functionChristoph Hellwig1-4/+0
All user of the pnp_find_card() compat wrapper are gone, so remove the function as well. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-10-08media: dt-bindings: media: venus: Add an optional power domain for perf votingRajendra Nayak2-2/+10
Venus needs to vote for the performance state of a power domain (cx) to be able to support DVFS. This 'cx' power domain is controlled by rpmh and is a common power domain (scalable) not specific to venus alone. This is optional in the sense that, leaving this power domain out does not really impact the functionality but just makes the platform a little less power efficient. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-10-07dt-bindings: Explicitly allow additional properties in common schemasRob Herring65-1/+135
In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As common/shared schema are included by other schemas, they should always allow for additionalProperties. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201005183830.486085-5-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-07dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties'Rob Herring26-27/+82
In cases where we don't reference another schema, 'additionalProperties' can be used instead. This is preferred for now as 'unevaluatedProperties' support isn't implemented yet. In a few cases, this means adding some missing property definitions of which most are for SPI bus properties. 'unevaluatedProperties' is not going to work for the SPI bus properties anyways as they are evaluated from the parent node, not the SPI child node. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201005183830.486085-3-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-07dt-bindings: Add missing 'unevaluatedProperties'Rob Herring112-0/+227
This doesn't yet do anything in the tools, but make it explicit so we can check either 'unevaluatedProperties' or 'additionalProperties' is present in schemas. 'unevaluatedProperties' is appropriate when including another schema (via '$ref') and all possible properties and/or child nodes are not explicitly listed in the schema with the '$ref'. This is in preparation to add a meta-schema to check for missing 'unevaluatedProperties' or 'additionalProperties'. This has been a constant source of review issues. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Wolfram Sang <wsa@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20201005183830.486085-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-07Docs: Fixing spelling errors in Documentation/devicetree/bindings/Marlon Rac Cambasis3-5/+5
Revised patch fixing six spelling errors within Documentation/devicetree/bindings/. "specfied" replaced with "specified" in all three files modified. "atleast" seperated into "at least" three times in samsung-pinctrl.txt. This should remove any confusion that a reader might have. Signed-off-by: Marlon Rac Cambasis <marlonrc08@gmail.com> Link: https://lore.kernel.org/r/20201007071705.GA11381@marlonpc-debian Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-07dt-bindings: pinctrl: sunxi: Allow pinctrl with more interrupt banksClément Péron1-1/+1
Recently introduced Allwinner A100 pinctrl block has 7 interrupts. This trig a warning when running dtb_checks: sun50i-a100-allwinner-perf1.dt.yaml: pinctrl@300b000: interrupts: [...] is too long From schema: .../allwinner,sun4i-a10-pinctrl.yaml Fix this by allowing up to 7 interrupts. Signed-off-by: Clément Péron <peron.clem@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201005190939.21016-1-peron.clem@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-10-07Merge branches 'arm/allwinner', 'arm/mediatek', 'arm/renesas', 'arm/tegra', ↵Joerg Roedel3-1/+213
'arm/qcom', 'arm/smmu', 'ppc/pamu', 'x86/amd', 'x86/vt-d' and 'core' into next
2020-10-06dt-bindings: hwmon: max20730: adding device tree doc for max20730Chu Lin1-0/+65
max20730 Integrated, Step-Down Switching Regulator with PMBus Signed-off-by: Chu Lin <linchuyuan@google.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201004031445.2321090-2-linchuyuan@google.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2020-10-06hwmon: Add DT bindings schema for PVT controllerRahul Tanwar1-0/+71
PVT controller (MR75203) is used to configure & control Moortec embedded analog IP which contains temprature sensor(TS), voltage monitor(VM) & process detector(PD) modules. Add DT bindings schema for PVT controller. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/b540b49ca47d75c5f716f8a4e4eed0664a1116bf.1601889876.git.rahul.tanwar@linux.intel.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2020-10-06dt-bindings: hwmon: Add the +vs supply to the lm75 bindingsAlban Bedel1-0/+4
Some boards might have a regulator that control the +VS supply, add it to the bindings. Signed-off-by: Alban Bedel <alban.bedel@aerq.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201001145738.17326-3-alban.bedel@aerq.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2020-10-06dt-bindings: hwmon: Convert lm75 bindings to yamlAlban Bedel2-39/+62
In order to automate the verification of DT nodes convert lm75.txt to lm75.yaml. Signed-off-by: Alban Bedel <alban.bedel@aerq.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201001145738.17326-2-alban.bedel@aerq.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2020-10-06dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to ↵Zhen Lei4-54/+68
json-schema Convert the Hisilicon Hi6220 domain controllers binding to DT schema format using json-schema. All of them are grouped into one yaml file, to help users understand differences and avoid repeated descriptions. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20200930031712.2365-16-thunder.leizhen@huawei.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: riscv: convert pwm bindings to json-schemaSagar Kadam2-33/+69
Convert device tree bindings for SiFive's PWM controller to YAML format. Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com> Link: https://lore.kernel.org/r/1601393531-2402-4-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: riscv: convert plic bindings to json-schemaSagar Kadam2-58/+97
Convert device tree bindings for SiFive's PLIC to YAML format Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com> Link: https://lore.kernel.org/r/1601393531-2402-3-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: fu540: prci: convert PRCI bindings to json-schemaSagar Kadam2-46/+60
FU540-C000 SoC from SiFive has a PRCI block, here we convert the device tree bindings from txt to YAML. Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com> Link: https://lore.kernel.org/r/1601393531-2402-2-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: vendor-prefixes: favor "gateworks" over "gw"Krzysztof Kozlowski1-0/+2
There are two vendor prefixes for Gateworks: "gw" and "gateworks". Favor the longer one (more descriptive) and mark "gw" as deprecated so it will not be used in new bindings. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201003103335.23404-1-krzk@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: Another round of adding missing 'additionalProperties'Rob Herring103-14/+281
Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Baolin Wang <baolin.wang7@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for iio Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Mark Brown <broonie@kernel.org> Reviewd-by: Corey Minyard <cminyard@mvista.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20201002234143.3570746-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: hwlock: omap: Fix warnings with k3.yamlSuman Anna1-2/+2
Update the AM65x HwSpinlock example to fix couple of warnings that started showing up after the conversion of K3 bindings to YAML format in commit 66e06509aa37 ("dt-bindings: arm: ti: Convert K3 board/soc bindings to DT schema"). compatible: ['ti,am654'] is not valid under any of the given schemas (Possible causes of the failure): compatible: ['ti,am654'] is too short compatible:0: 'ti,am654' is not one of ['ti,am654-evm'] Also, fix one of the node names while at this. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200928225155.12432-1-s-anna@ti.com Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: spi: add mt8192-nor compatible stringIkjoon Jang1-0/+1
Add MT8192 spi-nor controller support. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201006155010.v5.1.I4cd089ef1fe576535c6b6e4f1778eaab1c4441cf@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-06dt-bindings: serial: fsl-imx-uart: fix i.MX 53 and 6 compatible matchingKrzysztof Kozlowski1-2/+6
The i.MX 53 and i.MX6Q DTS use two compatibles, i.MX 6SL/6SLL/SX three so update the binding to fix dtbs_check warnings like: serial@21ec000: compatible: ['fsl,imx6q-uart', 'fsl,imx21-uart'] is not valid under any of the given schemas Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200925212649.23183-1-krzk@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06dt-bindings: mailbox: fsl,mu: Add missing power-domainsKrzysztof Kozlowski1-0/+3
Add quite common property - power-domains - to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d280000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201002161837.5784-1-krzk@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06Merge branch 'dt/linus' into dt/nextRob Herring18-22/+31
2020-10-06Merge branch 'cpufreq/arm/linux-next' of ↵Rafael J. Wysocki1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Pull ARM cpufreq updates for 5.10-rc1 from Viresh Kumar: "- STI cpufreq driver updates to allow new hardware (Alain Volmat). - Minor tegra driver fixes around initial frequency mismatch warnings (Jon Hunter). - dev_err simplification for s5pv210 driver (Krzysztof Kozlowski). - Qcom driver updates to allow new hardware and minor cleanup (Manivannan Sadhasivam and Matthias Kaehlcke). - Add missing MODULE_DEVICE_TABLE for armada driver (Pali Rohár). - Improved defer-probe handling in cpufreq-dt driver (Stephan Gerhold). - Call dev_pm_opp_of_remove_table() unconditionally for imx driver (Viresh Kumar)." * 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: cpufreq: qcom: Don't add frequencies without an OPP cpufreq: qcom-hw: Add cpufreq support for SM8250 SoC cpufreq: qcom-hw: Use of_device_get_match_data for offsets and row size cpufreq: qcom-hw: Use devm_platform_ioremap_resource() to simplify code dt-bindings: cpufreq: cpufreq-qcom-hw: Document Qcom EPSS compatible cpufreq: qcom-hw: Make use of cpufreq driver_data for passing pdev cpufreq: armada-37xx: Add missing MODULE_DEVICE_TABLE cpufreq: arm: Kconfig: add CPUFREQ_DT depend for STI CPUFREQ cpufreq: dt-platdev: Blacklist st,stih418 SoC cpufreq: sti-cpufreq: add stih418 support cpufreq: s5pv210: Use dev_err instead of pr_err in probe cpufreq: s5pv210: Simplify with dev_err_probe() cpufreq: tegra186: Fix initial frequency cpufreq: dt: Refactor initialization to handle probe deferral properly opp: Handle multiple calls for same OPP table in _of_add_opp_table_v1() cpufreq: imx6q: Unconditionally call dev_pm_opp_of_remove_table() opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER
2020-10-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds1-0/+1
Pull networking fixes from David Miller: 1) Make sure SKB control block is in the proper state during IPSEC ESP-in-TCP encapsulation. From Sabrina Dubroca. 2) Various kinds of attributes were not being cloned properly when we build new xfrm_state objects from existing ones. Fix from Antony Antony. 3) Make sure to keep BTF sections, from Tony Ambardar. 4) TX DMA channels need proper locking in lantiq driver, from Hauke Mehrtens. 5) Honour route MTU during forwarding, always. From Maciej Żenczykowski. 6) Fix races in kTLS which can result in crashes, from Rohit Maheshwari. 7) Skip TCP DSACKs with rediculous sequence ranges, from Priyaranjan Jha. 8) Use correct address family in xfrm state lookups, from Herbert Xu. 9) A bridge FDB flush should not clear out user managed fdb entries with the ext_learn flag set, from Nikolay Aleksandrov. 10) Fix nested locking of netdev address lists, from Taehee Yoo. 11) Fix handling of 32-bit DATA_FIN values in mptcp, from Mat Martineau. 12) Fix r8169 data corruptions on RTL8402 chips, from Heiner Kallweit. 13) Don't free command entries in mlx5 while comp handler could still be running, from Eran Ben Elisha. 14) Error flow of request_irq() in mlx5 is busted, due to an off by one we try to free and IRQ never allocated. From Maor Gottlieb. 15) Fix leak when dumping netlink policies, from Johannes Berg. 16) Sendpage cannot be performed when a page is a slab page, or the page count is < 1. Some subsystems such as nvme were doing so. Create a "sendpage_ok()" helper and use it as needed, from Coly Li. 17) Don't leak request socket when using syncookes with mptcp, from Paolo Abeni. * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (111 commits) net/core: check length before updating Ethertype in skb_mpls_{push,pop} net: mvneta: fix double free of txq->buf net_sched: check error pointer in tcf_dump_walker() net: team: fix memory leak in __team_options_register net: typhoon: Fix a typo Typoon --> Typhoon net: hinic: fix DEVLINK build errors net: stmmac: Modify configuration method of EEE timers tcp: fix syn cookied MPTCP request socket leak libceph: use sendpage_ok() in ceph_tcp_sendpage() scsi: libiscsi: use sendpage_ok() in iscsi_tcp_segment_map() drbd: code cleanup by using sendpage_ok() to check page for kernel_sendpage() tcp: use sendpage_ok() to detect misused .sendpage nvme-tcp: check page by sendpage_ok() before calling kernel_sendpage() net: add WARN_ONCE in kernel_sendpage() for improper zero-copy send net: introduce helper sendpage_ok() in include/linux/net.h net: usb: pegasus: Proper error handing when setting pegasus' MAC address net: core: document two new elements of struct net_device netlink: fix policy dump leak net/mlx5e: Fix race condition on nhe->n pointer in neigh update net/mlx5e: Fix VLAN create flow ...
2020-10-05spi: renesas,sh-msiof: Add r8a77961 supportGeert Uytterhoeven1-0/+1
Document R-Car M3-W+ (R8A77961) SoC bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201005112549.22222-1-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-05docs: hwmon: (ltc2945) update datasheet linkAlexandru Ardelean1-1/+1
Old one isn't working anymore. Update to the latest datasheet link. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20201005131226.1774081-1-alexandru.ardelean@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2020-10-05Merge remote-tracking branch 'regulator/for-5.10' into regulator-nextMark Brown15-445/+786